From 531f39d5dabb752b3f3c2599977442b0c8484444 Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Tue, 1 Jan 2019 14:40:51 +0100 Subject: Remove empty statement and Monoid instance --- src/Test/VeriFuzz/Verilog/AST.hs | 4 ---- 1 file changed, 4 deletions(-) (limited to 'src') diff --git a/src/Test/VeriFuzz/Verilog/AST.hs b/src/Test/VeriFuzz/Verilog/AST.hs index 5fa2d51..288fb2e 100644 --- a/src/Test/VeriFuzz/Verilog/AST.hs +++ b/src/Test/VeriFuzz/Verilog/AST.hs @@ -222,7 +222,6 @@ data Stmnt = TimeCtrl { _statDelay :: Delay | StatCA ContAssign -- ^ Stmnt continuous assignment. May not be correct. | TaskEnable Task | SysTaskEnable Task - | EmptyStat deriving (Eq) instance Semigroup Stmnt where @@ -231,9 +230,6 @@ instance Semigroup Stmnt where a <> (SeqBlock b) = SeqBlock $ a : b a <> b = SeqBlock [a, b] -instance Monoid Stmnt where - mempty = EmptyStat - data Task = Task { _taskName :: Identifier , _taskExpr :: [Expr] } deriving (Eq) -- cgit