From 5938621be5321e7e2f26735227977c9716a22e12 Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Tue, 2 Apr 2019 13:05:06 +0100 Subject: Fix Circuit types --- src/VeriFuzz/Circuit.hs | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) (limited to 'src') diff --git a/src/VeriFuzz/Circuit.hs b/src/VeriFuzz/Circuit.hs index b3f8dcd..af534a2 100644 --- a/src/VeriFuzz/Circuit.hs +++ b/src/VeriFuzz/Circuit.hs @@ -15,12 +15,12 @@ module VeriFuzz.Circuit Gate(..) , Circuit(..) , CNode(..) + , CEdge(..) ) where -import Data.Graph.Inductive (Gr, LNode) +import Data.Graph.Inductive (Gr, LEdge, LNode) import System.Random -import Test.QuickCheck -- | The types for all the gates. data Gate = And @@ -33,12 +33,11 @@ newtype Circuit = Circuit { getCircuit :: Gr Gate () } newtype CNode = CNode { getCNode :: LNode Gate } +newtype CEdge = CEdge { getCEdge :: LEdge () } + instance Random Gate where randomR (a, b) g = case randomR (fromEnum a, fromEnum b) g of (x, g') -> (toEnum x, g') random = randomR (minBound, maxBound) - -instance Arbitrary Gate where - arbitrary = elements [And, Or, Xor] -- cgit