From 94082601ca31c079065c494cc24020471e0d3e31 Mon Sep 17 00:00:00 2001
From: Yann Herklotz <ymherklotz@gmail.com>
Date: Sat, 2 Feb 2019 22:13:57 +0000
Subject: Try to add logging

---
 src/VeriFuzz/AST.hs     |  2 +-
 src/VeriFuzz/General.hs | 10 ++++++++--
 src/VeriFuzz/Icarus.hs  |  2 +-
 src/VeriFuzz/XST.hs     | 12 +++++++-----
 src/VeriFuzz/Yosys.hs   | 20 +++++++++++++-------
 5 files changed, 30 insertions(+), 16 deletions(-)

(limited to 'src')

diff --git a/src/VeriFuzz/AST.hs b/src/VeriFuzz/AST.hs
index 259da50..15fa792 100644
--- a/src/VeriFuzz/AST.hs
+++ b/src/VeriFuzz/AST.hs
@@ -207,7 +207,7 @@ instance QC.Arbitrary BinaryOperator where
     , BinXor
     , BinXNor
     , BinXNorInv
-    , BinPower
+--    , BinPower
     , BinLSL
     , BinLSR
     , BinASL
diff --git a/src/VeriFuzz/General.hs b/src/VeriFuzz/General.hs
index 1d2f183..37a8f90 100644
--- a/src/VeriFuzz/General.hs
+++ b/src/VeriFuzz/General.hs
@@ -46,11 +46,11 @@ rootPath = do
   maybe current fromText <$> get_env "VERIFUZZ_ROOT"
 
 timeout :: FilePath -> [Text] -> Sh Text
-timeout = command1 "timeout" ["180"] . toTextIgnore
+timeout = command1 "timeout" ["500"] . toTextIgnore
 {-# INLINE timeout #-}
 
 timeout_ :: FilePath -> [Text] -> Sh ()
-timeout_ = command1_ "timeout" ["180"] . toTextIgnore
+timeout_ = command1_ "timeout" ["500"] . toTextIgnore
 {-# INLINE timeout_ #-}
 
 -- | Helper function to convert bytestrings to integers
@@ -68,3 +68,9 @@ echoP t = do
   echo $ bname fn <> " :: " <> t
   where
     bname = T.pack . takeBaseName . T.unpack . toTextIgnore
+
+logger :: FilePath -> Text -> Sh a -> Sh a
+logger fp name =
+  log_stderr_with (l "_log.stderr.txt") . log_stdout_with (l "_log.txt")
+  where
+    l s = writeFile (T.unpack (toTextIgnore $ fp </> fromText name) <> s) . T.unpack
diff --git a/src/VeriFuzz/Icarus.hs b/src/VeriFuzz/Icarus.hs
index 8aa4698..ff389a4 100644
--- a/src/VeriFuzz/Icarus.hs
+++ b/src/VeriFuzz/Icarus.hs
@@ -62,5 +62,5 @@ runSimIcarus sim m bss = do
   let modWithTb = VerilogSrc $ Description <$> [newtb, m]
   writefile "main.v" $ genSource modWithTb
   echoP "Run icarus"
-  noPrint $ run_ (icarusPath sim) ["-o", "main", "main.v"]
+  run_ (icarusPath sim) ["-o", "main", "main.v"]
   hash <$> run (vvpPath sim) ["main"]
diff --git a/src/VeriFuzz/XST.hs b/src/VeriFuzz/XST.hs
index 3d745fe..b72d975 100644
--- a/src/VeriFuzz/XST.hs
+++ b/src/VeriFuzz/XST.hs
@@ -39,16 +39,18 @@ defaultXst =
 
 runSynthXst :: Xst -> ModDecl -> FilePath -> Sh ()
 runSynthXst sim m outf = do
+  dir <- pwd
   writefile xstFile $ xstSynthConfig m
   writefile prjFile [st|verilog work "rtl.v"|]
   writefile "rtl.v" $ genSource m
-  echoP "Run xst"
-  noPrint $ timeout_ (xstPath sim) ["-ifn", toTextIgnore xstFile]
-  echoP "Run netgen"
-  noPrint $ run_ (netgenPath sim)
+  echoP "XST: run"
+  _ <- logger dir "xst" $ timeout (xstPath sim) ["-ifn", toTextIgnore xstFile]
+  echoP "XST: netgen"
+  _ <- logger dir "netgen" $ run (netgenPath sim)
     ["-w", "-ofmt", "verilog", toTextIgnore $ modFile <.> "ngc", toTextIgnore outf]
-  echoP "Clean synthesized file"
+  echoP "XST: clean"
   noPrint $ run_ "sed" ["-i", "/^`ifndef/,/^`endif/ d; s/ *Timestamp: .*//;", toTextIgnore outf]
+  echoP "XST: done"
  where
   modFile = fromText $ modName m
   xstFile = modFile <.> "xst"
diff --git a/src/VeriFuzz/Yosys.hs b/src/VeriFuzz/Yosys.hs
index 676e1b0..e64104a 100644
--- a/src/VeriFuzz/Yosys.hs
+++ b/src/VeriFuzz/Yosys.hs
@@ -32,7 +32,7 @@ instance Synthesize Yosys where
   runSynth = runSynthYosys
 
 defaultYosys :: Yosys
-defaultYosys = Yosys "/usr/bin/yosys"
+defaultYosys = Yosys "yosys"
 
 writeSimFile
   :: Yosys    -- ^ Simulator instance
@@ -45,9 +45,11 @@ writeSimFile _ m file = do
 
 runSynthYosys :: Yosys -> ModDecl -> FilePath -> Sh ()
 runSynthYosys sim m outf = do
+  dir <- pwd
   writefile inpf $ genSource m
-  echoP "Run yosim"
-  noPrint $ run_ (yosysPath sim) ["-q", "-b", "verilog -noattr", "-o", out, "-S", inp]
+  echoP "Yosys: synthesis"
+  _ <- logger dir "yosys" $ run (yosysPath sim) ["-q", "-b", "verilog -noattr", "-o", out, "-S", inp]
+  echoP "Yosys: synthesis done"
  where
   inpf = "rtl.v"
   inp  = toTextIgnore inpf
@@ -64,17 +66,21 @@ runEquivYosys yosys sim1 sim2 m = do
   writefile checkFile $ yosysSatConfig sim1 sim2 m
   runSynth sim1 m $ fromText [st|syn_#{toText sim1}.v|]
   runMaybeSynth sim2 m
-  echoP "Run yosys"
-  noPrint $ run_ (yosysPath yosys) [toTextIgnore checkFile]
+  echoP "Yosys: equivalence check"
+  run_ (yosysPath yosys) [toTextIgnore checkFile]
+  echoP "Yosys: equivalence done"
   where
     checkFile = fromText [st|test.#{toText sim1}.#{maybe "rtl" toText sim2}.ys|]
 
 runEquiv :: (Synthesize a, Synthesize b) => Yosys -> a -> Maybe b -> ModDecl -> Sh ()
 runEquiv _ sim1 sim2 m = do
   root <- rootPath
+  dir <- pwd
+  echoP "SymbiYosys: setup"
   writefile "top.v" . genSource . initMod $ makeTopAssert m
   writefile "test.sby" $ sbyConfig root sim1 sim2 m
   runSynth sim1 m $ fromText [st|syn_#{toText sim1}.v|]
   runMaybeSynth sim2 m
-  echoP "Run SymbiYosys"
-  noPrint $ run_ "sby" ["test.sby"]
+  echoP "SymbiYosys: run"
+  _ <- logger dir "symbiyosys" $ run "sby" ["test.sby"]
+  echoP "SymbiYosys: done"
-- 
cgit