From bac2f24871d95eeb3aa3fc898a7656fc4f5f094a Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Mon, 1 Apr 2019 10:55:40 +0100 Subject: Run through brittany --- src/VeriFuzz.hs | 5 +- src/VeriFuzz/CodeGen.hs | 66 +++++++--------- src/VeriFuzz/Gen.hs | 20 +++-- src/VeriFuzz/Parser/Parser.hs | 157 +++++++++++++++++++------------------- src/VeriFuzz/Parser/Preprocess.hs | 124 +++++++++++++++++------------- src/VeriFuzz/Parser/Token.hs | 11 +-- 6 files changed, 199 insertions(+), 184 deletions(-) (limited to 'src') diff --git a/src/VeriFuzz.hs b/src/VeriFuzz.hs index efbb244..f151f10 100644 --- a/src/VeriFuzz.hs +++ b/src/VeriFuzz.hs @@ -64,8 +64,9 @@ import VeriFuzz.Yosys -- | Generate a specific number of random bytestrings of size 256. randomByteString :: C.CtrDRBG -> Int -> [ByteString] -> [ByteString] -randomByteString gen n bytes | n == 0 = ranBytes : bytes - | otherwise = randomByteString newGen (n - 1) $ ranBytes : bytes +randomByteString gen n bytes + | n == 0 = ranBytes : bytes + | otherwise = randomByteString newGen (n - 1) $ ranBytes : bytes where Right (ranBytes, newGen) = C.genBytes 32 gen -- | generates the specific number of bytestring with a random seed. diff --git a/src/VeriFuzz/CodeGen.hs b/src/VeriFuzz/CodeGen.hs index bd6372a..f122fa5 100644 --- a/src/VeriFuzz/CodeGen.hs +++ b/src/VeriFuzz/CodeGen.hs @@ -80,7 +80,7 @@ port p = t <> sign <> size <> name where t = flip mappend " " . pType $ p ^. portType size | p ^. portSize > 1 = "[" <> showT (p ^. portSize - 1) <> ":0] " - | otherwise = "" + | otherwise = "" name = p ^. portName . getIdentifier sign = signed $ p ^. portSigned @@ -99,19 +99,19 @@ moduleItem :: ModItem -> Text moduleItem (ModCA ca) = contAssign ca moduleItem (ModInst (Identifier i) (Identifier name) conn) = i <> " " <> name <> "(" <> comma (mConn <$> conn) <> ")" <> ";\n" -moduleItem (Initial stat ) = "initial " <> statement stat -moduleItem (Always stat ) = "always " <> statement stat -moduleItem (Decl dir p) = maybe "" makePort dir <> port p <> ";\n" +moduleItem (Initial stat) = "initial " <> statement stat +moduleItem (Always stat) = "always " <> statement stat +moduleItem (Decl dir p ) = maybe "" makePort dir <> port p <> ";\n" where makePort = (<> " ") . portDir mConn :: ModConn -> Text -mConn (ModConn c) = expr c -mConn (ModConnNamed n c) = - "." <> n ^. getIdentifier <> "(" <> expr c <> ")" +mConn (ModConn c ) = expr c +mConn (ModConnNamed n c) = "." <> n ^. getIdentifier <> "(" <> expr c <> ")" -- | Generate continuous assignment contAssign :: ContAssign -> Text -contAssign (ContAssign val e) = "assign " <> val ^. getIdentifier <> " = " <> expr e <> ";\n" +contAssign (ContAssign val e) = + "assign " <> val ^. getIdentifier <> " = " <> expr e <> ";\n" -- | Generate 'Function' to 'Text' func :: Function -> Text @@ -127,13 +127,12 @@ expr (Number s n) = where minus | signum n >= 0 = "" | otherwise = "-" -expr (Id i) = i ^. getIdentifier -expr (Concat c) = "{" <> comma (expr <$> c) <> "}" -expr (UnOp u e) = "(" <> unaryOp u <> expr e <> ")" -expr (Cond l t f) = - "(" <> expr l <> " ? " <> expr t <> " : " <> expr f <> ")" -expr (Func f e) = func f <> "(" <> expr e <> ")" -expr (Str t ) = "\"" <> t <> "\"" +expr (Id i ) = i ^. getIdentifier +expr (Concat c ) = "{" <> comma (expr <$> c) <> "}" +expr (UnOp u e ) = "(" <> unaryOp u <> expr e <> ")" +expr (Cond l t f) = "(" <> expr l <> " ? " <> expr t <> " : " <> expr f <> ")" +expr (Func f e ) = func f <> "(" <> expr e <> ")" +expr (Str t ) = "\"" <> t <> "\"" -- | Convert 'BinaryOperator' to 'Text'. binaryOp :: BinaryOperator -> Text @@ -179,7 +178,7 @@ unaryOp UnNxorInv = "^~" -- | Generate verilog code for an 'Event'. event :: Event -> Text -event (EId i ) = "@(" <> i ^. getIdentifier <> ")" +event (EId i) = "@(" <> i ^. getIdentifier <> ")" event (EExpr e) = "@(" <> expr e <> ")" event EAll = "@*" event (EPosEdge i) = "@(posedge " <> i ^. getIdentifier <> ")" @@ -191,16 +190,10 @@ delay (Delay i) = "#" <> showT i -- | Generate the verilog code for an 'LVal'. lVal :: LVal -> Text -lVal (RegId i ) = i ^. getIdentifier +lVal (RegId i ) = i ^. getIdentifier lVal (RegExpr i e) = i ^. getIdentifier <> " [" <> expr e <> "]" lVal (RegSize i msb lsb) = - i - ^. getIdentifier - <> " [" - <> constExpr msb - <> ":" - <> constExpr lsb - <> "]" + i ^. getIdentifier <> " [" <> constExpr msb <> ":" <> constExpr lsb <> "]" lVal (RegConcat e) = "{" <> comma (expr <$> e) <> "}" constExpr :: ConstExpr -> Text @@ -211,25 +204,24 @@ pType Wire = "wire" pType Reg = "reg" genAssign :: Text -> Assign -> Text -genAssign op (Assign r d e) = - lVal r <> op <> maybe "" delay d <> expr e +genAssign op (Assign r d e) = lVal r <> op <> maybe "" delay d <> expr e statement :: Statement -> Text -statement (TimeCtrl d stat ) = delay d <> " " <> defMap stat -statement (EventCtrl e stat ) = event e <> " " <> defMap stat +statement (TimeCtrl d stat ) = delay d <> " " <> defMap stat +statement (EventCtrl e stat ) = event e <> " " <> defMap stat statement (SeqBlock s) = "begin\n" <> fold (statement <$> s) <> "end\n" -statement (BlockAssign a ) = genAssign " = " a <> ";\n" -statement (NonBlockAssign a ) = genAssign " <= " a <> ";\n" -statement (StatCA a ) = contAssign a -statement (TaskEnable t) = task t <> ";\n" -statement (SysTaskEnable t) = "$" <> task t <> ";\n" +statement (BlockAssign a ) = genAssign " = " a <> ";\n" +statement (NonBlockAssign a ) = genAssign " <= " a <> ";\n" +statement (StatCA a ) = contAssign a +statement (TaskEnable t ) = task t <> ";\n" +statement (SysTaskEnable t ) = "$" <> task t <> ";\n" statement (CondStmnt e t Nothing) = "if(" <> expr e <> ")" <> defMap t -statement (CondStmnt e t f) = "if(" <> expr e <> ") " <> defMap t <> "else " <> defMap f +statement (CondStmnt e t f) = + "if(" <> expr e <> ") " <> defMap t <> "else " <> defMap f task :: Task -> Text -task (Task name e) - | null e = i - | otherwise = i <> "(" <> comma (expr <$> e) <> ")" +task (Task name e) | null e = i + | otherwise = i <> "(" <> comma (expr <$> e) <> ")" where i = name ^. getIdentifier -- | Render the 'Text' to 'IO'. This is equivalent to 'putStrLn'. diff --git a/src/VeriFuzz/Gen.hs b/src/VeriFuzz/Gen.hs index c3f2360..180d404 100644 --- a/src/VeriFuzz/Gen.hs +++ b/src/VeriFuzz/Gen.hs @@ -110,7 +110,7 @@ makeIdentifier prefix = do newPort :: PortType -> StateGen Port newPort pt = do ident <- makeIdentifier . T.toLower $ showT pt - p <- gen $ Port pt <$> QC.arbitrary <*> positiveArb <*> pure ident + p <- gen $ Port pt <$> QC.arbitrary <*> positiveArb <*> pure ident variables %= (p :) return p @@ -120,8 +120,7 @@ select ptype = do case filter chooseReg $ context ^.. variables . traverse of [] -> newPort ptype l -> gen $ QC.elements l - where - chooseReg (Port a _ _ _) = ptype == a + where chooseReg (Port a _ _ _) = ptype == a scopedExpr :: StateGen Expr scopedExpr = do @@ -156,7 +155,7 @@ assignment = do statement :: StateGen Statement statement = do prob <- askProbability - as <- assignment + as <- assignment gen $ QC.frequency [ (prob ^. probBlock , return $ BlockAssign as) , (prob ^. probNonBlock, return $ NonBlockAssign as) @@ -196,10 +195,9 @@ moduleDef top = do -- | Procedural generation method for random Verilog. Uses internal 'Reader' and -- 'State' to keep track of the current Verilog code structure. procedural :: Config -> Gen VerilogSrc -procedural config = - VerilogSrc - . (: []) - . Description - <$> QC.resize num (runReaderT (evalStateT (moduleDef True) context) config) - where context = Context [] 0 - num = config ^. configProperty . propSize +procedural config = VerilogSrc . (: []) . Description <$> QC.resize + num + (runReaderT (evalStateT (moduleDef True) context) config) + where + context = Context [] 0 + num = config ^. configProperty . propSize diff --git a/src/VeriFuzz/Parser/Parser.hs b/src/VeriFuzz/Parser/Parser.hs index 084cfe2..d7dc4ee 100644 --- a/src/VeriFuzz/Parser/Parser.hs +++ b/src/VeriFuzz/Parser/Parser.hs @@ -65,8 +65,9 @@ satisfy' :: (Token -> Maybe a) -> Parser a satisfy' = tokenPrim show nextPos nextPos :: SourcePos -> Token -> [Token] -> SourcePos -nextPos pos _ (Token _ _ (Position _ l c):_) = setSourceColumn (setSourceLine pos l) c -nextPos pos _ [] = pos +nextPos pos _ (Token _ _ (Position _ l c) : _) = + setSourceColumn (setSourceLine pos l) c +nextPos pos _ [] = pos -- | Parses given `TokenName`. tok :: TokenName -> Parser TokenName @@ -101,15 +102,16 @@ parseVar = Id <$> identifier systemFunc :: String -> Parser String systemFunc s = satisfy' matchId - where - matchId (Token IdSystem s' _) = - if s == s' then Just s else Nothing - matchId _ = Nothing + where + matchId (Token IdSystem s' _) = if s == s' then Just s else Nothing + matchId _ = Nothing parseFunction :: Parser Function parseFunction = - systemFunc "$unsigned" $> UnSignedFunc - <|> systemFunc "$signed" $> SignedFunc + systemFunc "$unsigned" + $> UnSignedFunc + <|> systemFunc "$signed" + $> SignedFunc parseFun :: Parser Expr parseFun = do @@ -143,51 +145,51 @@ parseExpr = do -- | Table of binary and unary operators that encode the right precedence for -- each. parseTable :: [[ParseOperator Expr]] -parseTable - = [ [prefix SymBang (UnOp UnLNot), prefix SymTildy (UnOp UnNot)] - , [ prefix SymAmp (UnOp UnAnd) - , prefix SymBar (UnOp UnOr) - , prefix SymTildyAmp (UnOp UnNand) - , prefix SymTildyBar (UnOp UnNor) - , prefix SymHat (UnOp UnXor) - , prefix SymTildyHat (UnOp UnNxor) - , prefix SymHatTildy (UnOp UnNxorInv) - ] - , [prefix SymPlus (UnOp UnPlus), prefix SymDash (UnOp UnMinus)] - , [binary SymAsterAster (sBinOp BinPower) AssocRight] - , [ binary SymAster (sBinOp BinTimes) AssocLeft - , binary SymSlash (sBinOp BinDiv) AssocLeft - , binary SymPercent (sBinOp BinMod) AssocLeft - ] - , [ binary SymPlus (sBinOp BinPlus) AssocLeft - , binary SymDash (sBinOp BinPlus) AssocLeft - ] - , [ binary SymLtLt (sBinOp BinLSL) AssocLeft - , binary SymGtGt (sBinOp BinLSR) AssocLeft - ] - , [ binary SymLtLtLt (sBinOp BinASL) AssocLeft - , binary SymGtGtGt (sBinOp BinASR) AssocLeft - ] - , [ binary SymLt (sBinOp BinLT) AssocNone - , binary SymGt (sBinOp BinGT) AssocNone - , binary SymLtEq (sBinOp BinLEq) AssocNone - , binary SymGtEq (sBinOp BinLEq) AssocNone - ] - , [ binary SymEqEq (sBinOp BinEq) AssocNone - , binary SymBangEq (sBinOp BinNEq) AssocNone - ] - , [ binary SymEqEqEq (sBinOp BinEq) AssocNone - , binary SymBangEqEq (sBinOp BinNEq) AssocNone - ] - , [binary SymAmp (sBinOp BinAnd) AssocLeft] - , [ binary SymHat (sBinOp BinXor) AssocLeft - , binary SymHatTildy (sBinOp BinXNor) AssocLeft - , binary SymTildyHat (sBinOp BinXNorInv) AssocLeft - ] - , [binary SymBar (sBinOp BinOr) AssocLeft] - , [binary SymAmpAmp (sBinOp BinLAnd) AssocLeft] - , [binary SymBarBar (sBinOp BinLOr) AssocLeft] +parseTable = + [ [prefix SymBang (UnOp UnLNot), prefix SymTildy (UnOp UnNot)] + , [ prefix SymAmp (UnOp UnAnd) + , prefix SymBar (UnOp UnOr) + , prefix SymTildyAmp (UnOp UnNand) + , prefix SymTildyBar (UnOp UnNor) + , prefix SymHat (UnOp UnXor) + , prefix SymTildyHat (UnOp UnNxor) + , prefix SymHatTildy (UnOp UnNxorInv) + ] + , [prefix SymPlus (UnOp UnPlus), prefix SymDash (UnOp UnMinus)] + , [binary SymAsterAster (sBinOp BinPower) AssocRight] + , [ binary SymAster (sBinOp BinTimes) AssocLeft + , binary SymSlash (sBinOp BinDiv) AssocLeft + , binary SymPercent (sBinOp BinMod) AssocLeft + ] + , [ binary SymPlus (sBinOp BinPlus) AssocLeft + , binary SymDash (sBinOp BinPlus) AssocLeft + ] + , [ binary SymLtLt (sBinOp BinLSL) AssocLeft + , binary SymGtGt (sBinOp BinLSR) AssocLeft + ] + , [ binary SymLtLtLt (sBinOp BinASL) AssocLeft + , binary SymGtGtGt (sBinOp BinASR) AssocLeft + ] + , [ binary SymLt (sBinOp BinLT) AssocNone + , binary SymGt (sBinOp BinGT) AssocNone + , binary SymLtEq (sBinOp BinLEq) AssocNone + , binary SymGtEq (sBinOp BinLEq) AssocNone ] + , [ binary SymEqEq (sBinOp BinEq) AssocNone + , binary SymBangEq (sBinOp BinNEq) AssocNone + ] + , [ binary SymEqEqEq (sBinOp BinEq) AssocNone + , binary SymBangEqEq (sBinOp BinNEq) AssocNone + ] + , [binary SymAmp (sBinOp BinAnd) AssocLeft] + , [ binary SymHat (sBinOp BinXor) AssocLeft + , binary SymHatTildy (sBinOp BinXNor) AssocLeft + , binary SymTildyHat (sBinOp BinXNorInv) AssocLeft + ] + , [binary SymBar (sBinOp BinOr) AssocLeft] + , [binary SymAmpAmp (sBinOp BinLAnd) AssocLeft] + , [binary SymBarBar (sBinOp BinLOr) AssocLeft] + ] binary :: TokenName -> (a -> a -> a) -> Assoc -> ParseOperator a binary name fun = Infix ((tok name "binary") >> return fun) @@ -207,27 +209,29 @@ parseContAssign = do numLit :: Parser String numLit = satisfy' matchId - where - matchId (Token LitNumber s _) = Just s - matchId _ = Nothing + where + matchId (Token LitNumber s _) = Just s + matchId _ = Nothing number :: Parser Decimal number = number' <$> numLit where - number' :: String -> Decimal - number' a - | all (flip elem ['0' .. '9']) a = fromInteger $ read a - | head a == '\'' = fromInteger $ f a - | isInfixOf "'" a = Decimal (read w) (f b) - | otherwise = error $ "Invalid number format: " ++ a - where - w = takeWhile (/= '\'') a - b = dropWhile (/= '\'') a - f a' - | isPrefixOf "'d" a' = read $ drop 2 a' - | isPrefixOf "'h" a' = read $ "0x" ++ drop 2 a' - | isPrefixOf "'b" a' = foldl (\ n b' -> shiftL n 1 .|. (if b' == '1' then 1 else 0)) 0 (drop 2 a') - | otherwise = error $ "Invalid number format: " ++ a' + number' :: String -> Decimal + number' a | all (flip elem ['0' .. '9']) a = fromInteger $ read a + | head a == '\'' = fromInteger $ f a + | isInfixOf "'" a = Decimal (read w) (f b) + | otherwise = error $ "Invalid number format: " ++ a + where + w = takeWhile (/= '\'') a + b = dropWhile (/= '\'') a + f a' + | isPrefixOf "'d" a' = read $ drop 2 a' + | isPrefixOf "'h" a' = read $ "0x" ++ drop 2 a' + | isPrefixOf "'b" a' = foldl + (\n b' -> shiftL n 1 .|. (if b' == '1' then 1 else 0)) + 0 + (drop 2 a') + | otherwise = error $ "Invalid number format: " ++ a' toInteger' :: Decimal -> Integer toInteger' (Decimal _ n) = n @@ -243,10 +247,10 @@ parseRange = do strId :: Parser String strId = satisfy' matchId - where - matchId (Token IdSimple s _) = Just s - matchId (Token IdEscaped s _) = Just s - matchId _ = Nothing + where + matchId (Token IdSimple s _) = Just s + matchId (Token IdEscaped s _) = Just s + matchId _ = Nothing identifier :: Parser Identifier identifier = Identifier . T.pack <$> strId @@ -277,8 +281,7 @@ parseModItem :: Parser ModItem parseModItem = (ModCA <$> parseContAssign) <|> parseDecl parseModList :: Parser [Identifier] -parseModList = list <|> return [] - where list = parens $ commaSep identifier +parseModList = list <|> return [] where list = parens $ commaSep identifier filterDecl :: PortDir -> ModItem -> Bool filterDecl p (Decl (Just p') _) = p == p' @@ -289,8 +292,8 @@ modPorts p mis = filter (filterDecl p) mis ^.. traverse . declPort parseModDecl :: Parser ModDecl parseModDecl = do - name <- tok KWModule *> identifier - _ <- fmap defaultPort <$> parseModList + name <- tok KWModule *> identifier + _ <- fmap defaultPort <$> parseModList tok' SymSemi modItem <- option [] . try $ many1 parseModItem tok' KWEndmodule diff --git a/src/VeriFuzz/Parser/Preprocess.hs b/src/VeriFuzz/Parser/Preprocess.hs index c0a4246..1483a83 100644 --- a/src/VeriFuzz/Parser/Preprocess.hs +++ b/src/VeriFuzz/Parser/Preprocess.hs @@ -15,74 +15,94 @@ Edits to the original code are warning fixes and formatting changes. -} module VeriFuzz.Parser.Preprocess - ( uncomment - , preprocess - ) where + ( uncomment + , preprocess + ) +where -- | Remove comments from code. uncomment :: FilePath -> String -> String uncomment file = uncomment' where - uncomment' a = case a of - "" -> "" - '/' : '/' : rest -> " " ++ removeEOL rest - '/' : '*' : rest -> " " ++ remove rest - '"' : rest -> '"' : ignoreString rest - b : rest -> b : uncomment' rest + uncomment' a = case a of + "" -> "" + '/' : '/' : rest -> " " ++ removeEOL rest + '/' : '*' : rest -> " " ++ remove rest + '"' : rest -> '"' : ignoreString rest + b : rest -> b : uncomment' rest - removeEOL a = case a of - "" -> "" - '\n' : rest -> '\n' : uncomment' rest - '\t' : rest -> '\t' : removeEOL rest - _ : rest -> ' ' : removeEOL rest + removeEOL a = case a of + "" -> "" + '\n' : rest -> '\n' : uncomment' rest + '\t' : rest -> '\t' : removeEOL rest + _ : rest -> ' ' : removeEOL rest - remove a = case a of - "" -> error $ "File ended without closing comment (*/): " ++ file - '"' : rest -> removeString rest - '\n' : rest -> '\n' : remove rest - '\t' : rest -> '\t' : remove rest - '*' : '/' : rest -> " " ++ uncomment' rest - _ : rest -> " " ++ remove rest + remove a = case a of + "" -> error $ "File ended without closing comment (*/): " ++ file + '"' : rest -> removeString rest + '\n' : rest -> '\n' : remove rest + '\t' : rest -> '\t' : remove rest + '*' : '/' : rest -> " " ++ uncomment' rest + _ : rest -> " " ++ remove rest - removeString a = case a of - "" -> error $ "File ended without closing string: " ++ file - '"' : rest -> " " ++ remove rest - '\\' : '"' : rest -> " " ++ removeString rest - '\n' : rest -> '\n' : removeString rest - '\t' : rest -> '\t' : removeString rest - _ : rest -> ' ' : removeString rest + removeString a = case a of + "" -> error $ "File ended without closing string: " ++ file + '"' : rest -> " " ++ remove rest + '\\' : '"' : rest -> " " ++ removeString rest + '\n' : rest -> '\n' : removeString rest + '\t' : rest -> '\t' : removeString rest + _ : rest -> ' ' : removeString rest - ignoreString a = case a of - "" -> error $ "File ended without closing string: " ++ file - '"' : rest -> '"' : uncomment' rest - '\\' : '"' : rest -> "\\\"" ++ ignoreString rest - b : rest -> b : ignoreString rest + ignoreString a = case a of + "" -> error $ "File ended without closing string: " ++ file + '"' : rest -> '"' : uncomment' rest + '\\' : '"' : rest -> "\\\"" ++ ignoreString rest + b : rest -> b : ignoreString rest -- | A simple `define preprocessor. preprocess :: [(String, String)] -> FilePath -> String -> String -preprocess env file content = unlines $ pp True [] env $ lines $ uncomment file content +preprocess env file content = unlines $ pp True [] env $ lines $ uncomment + file + content where - pp :: Bool -> [Bool] -> [(String, String)] -> [String] -> [String] - pp _ _ _ [] = [] - pp on stack env_ (a : rest) = case words a of - "`define" : name : value -> "" : pp on stack (if on then (name, ppLine env_ $ unwords value) : env_ else env_) rest - "`ifdef" : name : _ -> "" : pp (on && elem name (map fst env_)) (on : stack) env_ rest - "`ifndef" : name : _ -> "" : pp (on && notElem name (map fst env_)) (on : stack) env_ rest - "`else" : _ - | not $ null stack -> "" : pp (head stack && not on) stack env_ rest - | otherwise -> error $ "`else without associated `ifdef/`ifndef: " ++ file - "`endif" : _ - | not $ null stack -> "" : pp (head stack) (tail stack) env_ rest - | otherwise -> error $ "`endif without associated `ifdef/`ifndef: " ++ file - _ -> (if on then ppLine env_ a else "") : pp on stack env_ rest + pp :: Bool -> [Bool] -> [(String, String)] -> [String] -> [String] + pp _ _ _ [] = [] + pp on stack env_ (a : rest) = case words a of + "`define" : name : value -> + "" + : pp + on + stack + (if on + then (name, ppLine env_ $ unwords value) : env_ + else env_ + ) + rest + "`ifdef" : name : _ -> + "" : pp (on && elem name (map fst env_)) (on : stack) env_ rest + "`ifndef" : name : _ -> + "" : pp (on && notElem name (map fst env_)) (on : stack) env_ rest + "`else" : _ + | not $ null stack + -> "" : pp (head stack && not on) stack env_ rest + | otherwise + -> error $ "`else without associated `ifdef/`ifndef: " ++ file + "`endif" : _ + | not $ null stack + -> "" : pp (head stack) (tail stack) env_ rest + | otherwise + -> error $ "`endif without associated `ifdef/`ifndef: " ++ file + _ -> (if on then ppLine env_ a else "") : pp on stack env_ rest ppLine :: [(String, String)] -> String -> String -ppLine _ "" = "" +ppLine _ "" = "" ppLine env ('`' : a) = case lookup name env of - Just value -> value ++ ppLine env rest - Nothing -> error $ "Undefined macro: `" ++ name ++ " Env: " ++ show env + Just value -> value ++ ppLine env rest + Nothing -> error $ "Undefined macro: `" ++ name ++ " Env: " ++ show env where - name = takeWhile (flip elem $ ['A' .. 'Z'] ++ ['a' .. 'z'] ++ ['0' .. '9'] ++ ['_']) a - rest = drop (length name) a + name = takeWhile + (flip elem $ ['A' .. 'Z'] ++ ['a' .. 'z'] ++ ['0' .. '9'] ++ ['_']) + a + rest = drop (length name) a ppLine env (a : b) = a : ppLine env b diff --git a/src/VeriFuzz/Parser/Token.hs b/src/VeriFuzz/Parser/Token.hs index f776dd8..811331b 100644 --- a/src/VeriFuzz/Parser/Token.hs +++ b/src/VeriFuzz/Parser/Token.hs @@ -1,9 +1,10 @@ module VeriFuzz.Parser.Token - ( Token (..) - , TokenName (..) - , Position (..) - , tokenString - ) where + ( Token(..) + , TokenName(..) + , Position(..) + , tokenString + ) +where import Text.Printf -- cgit