From e14fbc146d93bdebbf22c0a9ceb58ee3459de4b7 Mon Sep 17 00:00:00 2001
From: Yann Herklotz <ymherklotz@gmail.com>
Date: Sat, 2 Feb 2019 13:44:07 +0000
Subject: Add mutation to declare other wires

---
 src/VeriFuzz/Gen.hs | 35 ++++++++++++++++++++++++++++-------
 1 file changed, 28 insertions(+), 7 deletions(-)

(limited to 'src')

diff --git a/src/VeriFuzz/Gen.hs b/src/VeriFuzz/Gen.hs
index 9eecdbf..5bf1af1 100644
--- a/src/VeriFuzz/Gen.hs
+++ b/src/VeriFuzz/Gen.hs
@@ -13,6 +13,7 @@ Various useful generators.
 module VeriFuzz.Gen where
 
 import           Control.Lens
+import           Data.Foldable   (fold)
 import qualified Data.Text       as T
 import           Test.QuickCheck (Gen)
 import qualified Test.QuickCheck as QC
@@ -21,6 +22,18 @@ import           VeriFuzz.ASTGen
 import           VeriFuzz.Mutate
 import           VeriFuzz.Random
 
+toId :: Int -> Identifier
+toId = Identifier . ("w"<>) . T.pack . show
+
+toPort :: Identifier -> Gen Port
+toPort ident = do
+  i <- abs <$> QC.arbitrary
+  return $ Port Wire i ident
+
+sumSize :: [Port] -> Int
+sumSize ports =
+  sum $ ports ^.. traverse . portSize
+
 random :: [Identifier] -> (Expr -> ContAssign) -> Gen ModItem
 random ctx fun = do
   expr <- QC.sized (exprWithContext ctx)
@@ -29,14 +42,22 @@ random ctx fun = do
 randomAssigns :: [Identifier] -> [Gen ModItem]
 randomAssigns ids = random ids . ContAssign <$> ids
 
-randomMod :: Gen ModDecl
-randomMod = do
-  let ids = toId <$> [1..100]
-  sequence_ $ randomAssigns ids
-  return $ ModDecl "" [] [] []
+randomOrdAssigns :: [Identifier] -> [Identifier] -> [Gen ModItem]
+randomOrdAssigns inp ids =
+  snd $ foldr gen (inp, []) ids
   where
-    toId :: Int -> Identifier
-    toId = Identifier . ("w"<>) . T.pack . show
+    gen cid (i, o) = (cid : i, o ++ [random i $ ContAssign cid])
+
+randomMod :: Int -> Int -> Gen ModDecl
+randomMod inps total = do
+  let ids = toId <$> [1..total]
+  x <- sequence . randomOrdAssigns (take inps ids) $ drop inps ids
+  ident <-  sequence $ toPort <$> ids
+  let inputs = take inps ident
+  let other = drop inps ident
+  let y = ModCA . ContAssign "y" . fold $ Id <$> drop inps ids
+  let yport = [Port Wire (sumSize other) "y"]
+  return . initMod . declareMod other .ModDecl "test_module" yport inputs $ x ++ [y]
 
 fromGraph :: Gen ModDecl
 fromGraph = do
-- 
cgit