From 14158fc4ef0809adbbf0b7fdd0c0d5e0fafc2435 Mon Sep 17 00:00:00 2001 From: Yann Herklotz Date: Fri, 24 May 2019 15:45:35 +0100 Subject: Fix used wire check for clk --- test/Reduce.hs | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'test') diff --git a/test/Reduce.hs b/test/Reduce.hs index 9c59e48..bc4bbc3 100644 --- a/test/Reduce.hs +++ b/test/Reduce.hs @@ -52,6 +52,7 @@ module top; reg h; wire i; wire j; + wire clk; initial d <= a; always @* begin @@ -62,6 +63,8 @@ module top; end end + always @(posedge clk); + assign b = g; endmodule |] @@ -74,6 +77,7 @@ module top; reg f; reg g; reg h; + wire clk; initial d <= a; always @* begin @@ -84,6 +88,8 @@ module top; end end + always @(posedge clk); + assign b = g; endmodule |] -- cgit