+++
title = "Solution in Vericert"
date = "2022-05-17"
author = "Yann Herklotz"
tags = []
categories = []
backlinks = ["1c4a"]
forwardlinks = ["1c4b1"]
zettelid = "1c4b"
+++

One possible solution to this in Vericert is to add the MAC operation as
a valid operation in the Verilog instruction. This means that one can
then have a peephole optimisation pass (maybe as part of the scheduling
pass), which will then introduce the MAC operations into the graph.