]> Release 14.7 Trace (lin64)Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved./opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64/unwrapped/trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml led.twx led.ncd -o led.twr led.pcf -ucf BPC3011-Papilio_Pro-general.ucf led.ncdled.ncdled.pcfled.pcfxc6slx9C-2PRODUCTION 1.23 2013-10-1313INFO:Timing:3412 - To improve timing, see the Timing Closure User Guide (UG612).INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths option. All paths that are not constrained will be reported in the unconstrained paths section(s) of the report.INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on a 50 Ohm transmission line loading model. For the details of this model, and for more information on accounting for different loading conditions, please see the device datasheet.NET "CLK_BUFGP/IBUFG" PERIOD = 31.25 ns HIGH 50%;901000012503.695Paths for end point count_1 (SLICE_X13Y38.B1), 6 paths 27.555count_9count_13.6450.01531.2500.035count_9count_12SLICE_X13Y40.CLKCLK_BUFGPSLICE_X13Y40.BQTcko0.430count<11>count_9SLICE_X14Y41.B3net31.341count<9>SLICE_X14Y41.BTilo0.235LED1_OBUFcount[26]_GND_1_o_equal_2_o<26>4SLICE_X13Y38.B1net191.266count[26]_GND_1_o_equal_2_o<26>3SLICE_X13Y38.CLKTas0.373count<3>count_1_rstpotcount_11.0382.6073.645CLK_BUFGP28.571.527.760count_10count_13.4400.01531.2500.035count_10count_12SLICE_X13Y40.CLKCLK_BUFGPSLICE_X13Y40.CQTcko0.430count<11>count_10SLICE_X14Y41.B1net31.136count<10>SLICE_X14Y41.BTilo0.235LED1_OBUFcount[26]_GND_1_o_equal_2_o<26>4SLICE_X13Y38.B1net191.266count[26]_GND_1_o_equal_2_o<26>3SLICE_X13Y38.CLKTas0.373count<3>count_1_rstpotcount_11.0382.4023.440CLK_BUFGP30.269.827.948count_11count_13.2520.01531.2500.035count_11count_12SLICE_X13Y40.CLKCLK_BUFGPSLICE_X13Y40.DQTcko0.430count<11>count_11SLICE_X14Y41.B2net30.948count<11>SLICE_X14Y41.BTilo0.235LED1_OBUFcount[26]_GND_1_o_equal_2_o<26>4SLICE_X13Y38.B1net191.266count[26]_GND_1_o_equal_2_o<26>3SLICE_X13Y38.CLKTas0.373count<3>count_1_rstpotcount_11.0382.2143.252CLK_BUFGP31.968.1Paths for end point count_7 (SLICE_X13Y39.D2), 6 paths 27.560count_9count_73.6380.01731.2500.035count_9count_72SLICE_X13Y40.CLKCLK_BUFGPSLICE_X13Y40.BQTcko0.430count<11>count_9SLICE_X14Y41.B3net31.341count<9>SLICE_X14Y41.BTilo0.235LED1_OBUFcount[26]_GND_1_o_equal_2_o<26>4SLICE_X13Y39.D2net191.259count[26]_GND_1_o_equal_2_o<26>3SLICE_X13Y39.CLKTas0.373count<7>count_7_rstpotcount_71.0382.6003.638CLK_BUFGP28.571.527.765count_10count_73.4330.01731.2500.035count_10count_72SLICE_X13Y40.CLKCLK_BUFGPSLICE_X13Y40.CQTcko0.430count<11>count_10SLICE_X14Y41.B1net31.136count<10>SLICE_X14Y41.BTilo0.235LED1_OBUFcount[26]_GND_1_o_equal_2_o<26>4SLICE_X13Y39.D2net191.259count[26]_GND_1_o_equal_2_o<26>3SLICE_X13Y39.CLKTas0.373count<7>count_7_rstpotcount_71.0382.3953.433CLK_BUFGP30.269.827.953count_11count_73.2450.01731.2500.035count_11count_72SLICE_X13Y40.CLKCLK_BUFGPSLICE_X13Y40.DQTcko0.430count<11>count_11SLICE_X14Y41.B2net30.948count<11>SLICE_X14Y41.BTilo0.235LED1_OBUFcount[26]_GND_1_o_equal_2_o<26>4SLICE_X13Y39.D2net191.259count[26]_GND_1_o_equal_2_o<26>3SLICE_X13Y39.CLKTas0.373count<7>count_7_rstpotcount_71.0382.2073.245CLK_BUFGP32.068.0Paths for end point count_23 (SLICE_X13Y41.A1), 24 paths 27.618count_1count_233.5800.01731.2500.035count_1count_237SLICE_X13Y38.CLKCLK_BUFGPSLICE_X13Y38.BQTcko0.430count<3>count_1SLICE_X12Y38.B1net30.730count<1>SLICE_X12Y38.COUTTopcyb0.483Mcount_count_cy<3>Mcount_count_lut<1>_INV_0Mcount_count_cy<3>SLICE_X12Y39.CINnet10.003Mcount_count_cy<3>SLICE_X12Y39.COUTTbyp0.093Mcount_count_cy<7>Mcount_count_cy<7>SLICE_X12Y40.CINnet10.082Mcount_count_cy<7>SLICE_X12Y40.COUTTbyp0.093Mcount_count_cy<11>Mcount_count_cy<11>SLICE_X12Y41.CINnet10.003Mcount_count_cy<11>SLICE_X12Y41.COUTTbyp0.093Mcount_count_cy<15>Mcount_count_cy<15>SLICE_X12Y42.CINnet10.003Mcount_count_cy<15>SLICE_X12Y42.COUTTbyp0.093Mcount_count_cy<19>Mcount_count_cy<19>SLICE_X12Y43.CINnet10.003Mcount_count_cy<19>SLICE_X12Y43.DMUXTcind0.320Result<23>Mcount_count_xor<23>SLICE_X13Y41.A1net10.778Result<23>SLICE_X13Y41.CLKTas0.373count<23>count_23_rstpotcount_231.9781.6023.580CLK_BUFGP55.344.727.628count_0count_233.5700.01731.2500.035count_0count_237SLICE_X13Y38.CLKCLK_BUFGPSLICE_X13Y38.AQTcko0.430count<3>count_0SLICE_X12Y38.A2net30.729count<0>SLICE_X12Y38.COUTTopcya0.474Mcount_count_cy<3>count<0>_rtMcount_count_cy<3>SLICE_X12Y39.CINnet10.003Mcount_count_cy<3>SLICE_X12Y39.COUTTbyp0.093Mcount_count_cy<7>Mcount_count_cy<7>SLICE_X12Y40.CINnet10.082Mcount_count_cy<7>SLICE_X12Y40.COUTTbyp0.093Mcount_count_cy<11>Mcount_count_cy<11>SLICE_X12Y41.CINnet10.003Mcount_count_cy<11>SLICE_X12Y41.COUTTbyp0.093Mcount_count_cy<15>Mcount_count_cy<15>SLICE_X12Y42.CINnet10.003Mcount_count_cy<15>SLICE_X12Y42.COUTTbyp0.093Mcount_count_cy<19>Mcount_count_cy<19>SLICE_X12Y43.CINnet10.003Mcount_count_cy<19>SLICE_X12Y43.DMUXTcind0.320Result<23>Mcount_count_xor<23>SLICE_X13Y41.A1net10.778Result<23>SLICE_X13Y41.CLKTas0.373count<23>count_23_rstpotcount_231.9691.6013.570CLK_BUFGP55.244.827.639count_5count_233.5610.01531.2500.035count_5count_236SLICE_X13Y39.CLKCLK_BUFGPSLICE_X13Y39.BQTcko0.430count<7>count_5SLICE_X12Y39.B1net30.807count<5>SLICE_X12Y39.COUTTopcyb0.483Mcount_count_cy<7>Mcount_count_lut<5>_INV_0Mcount_count_cy<7>SLICE_X12Y40.CINnet10.082Mcount_count_cy<7>SLICE_X12Y40.COUTTbyp0.093Mcount_count_cy<11>Mcount_count_cy<11>SLICE_X12Y41.CINnet10.003Mcount_count_cy<11>SLICE_X12Y41.COUTTbyp0.093Mcount_count_cy<15>Mcount_count_cy<15>SLICE_X12Y42.CINnet10.003Mcount_count_cy<15>SLICE_X12Y42.COUTTbyp0.093Mcount_count_cy<19>Mcount_count_cy<19>SLICE_X12Y43.CINnet10.003Mcount_count_cy<19>SLICE_X12Y43.DMUXTcind0.320Result<23>Mcount_count_xor<23>SLICE_X13Y41.A1net10.778Result<23>SLICE_X13Y41.CLKTas0.373count<23>count_23_rstpotcount_231.8851.6763.561CLK_BUFGP52.947.1Hold Paths: NET "CLK_BUFGP/IBUFG" PERIOD = 31.25 ns HIGH 50%; Paths for end point LED1 (SLICE_X14Y41.A6), 1 path 0.418LED1LED10.4180.0000.0000.000LED1LED11SLICE_X14Y41.CLKCLK_BUFGPSLICE_X14Y41.AQTcko0.200LED1_OBUFLED1SLICE_X14Y41.A6net20.028LED1_OBUFSLICE_X14Y41.CLKTah0.190LED1_OBUFLED1_rstpotLED10.3900.0280.418CLK_BUFGP93.36.7Paths for end point count_12 (SLICE_X15Y41.A6), 6 paths 0.689count_14count_120.6890.0000.0000.000count_14count_122SLICE_X15Y41.CLKCLK_BUFGPSLICE_X15Y41.DQTcko0.198count<14>count_14SLICE_X14Y41.C6net30.032count<14>SLICE_X14Y41.CTilo0.142LED1_OBUFcount[26]_GND_1_o_equal_2_o<26>1SLICE_X15Y41.A6net130.102count[26]_GND_1_o_equal_2_o<26>SLICE_X15Y41.CLKTah0.215count<14>count_12_rstpotcount_120.5550.1340.689CLK_BUFGP80.619.40.829count_17count_120.8290.0000.0000.000count_17count_122SLICE_X15Y42.CLKCLK_BUFGPSLICE_X15Y42.CQTcko0.198count<18>count_17SLICE_X14Y41.C5net30.172count<17>SLICE_X14Y41.CTilo0.142LED1_OBUFcount[26]_GND_1_o_equal_2_o<26>1SLICE_X15Y41.A6net130.102count[26]_GND_1_o_equal_2_o<26>SLICE_X15Y41.CLKTah0.215count<14>count_12_rstpotcount_120.5550.2740.829CLK_BUFGP66.933.10.881count_15count_120.8810.0000.0000.000count_15count_122SLICE_X15Y42.CLKCLK_BUFGPSLICE_X15Y42.AQTcko0.198count<18>count_15SLICE_X14Y41.C4net30.224count<15>SLICE_X14Y41.CTilo0.142LED1_OBUFcount[26]_GND_1_o_equal_2_o<26>1SLICE_X15Y41.A6net130.102count[26]_GND_1_o_equal_2_o<26>SLICE_X15Y41.CLKTah0.215count<14>count_12_rstpotcount_120.5550.3260.881CLK_BUFGP63.037.0Paths for end point LED1 (SLICE_X14Y41.A1), 6 paths 0.812count_14LED10.814-0.0020.0000.000count_14LED12SLICE_X15Y41.CLKCLK_BUFGPSLICE_X15Y41.DQTcko0.198count<14>count_14SLICE_X14Y41.C6net30.032count<14>SLICE_X14Y41.CTilo0.142LED1_OBUFcount[26]_GND_1_o_equal_2_o<26>1SLICE_X14Y41.A1net130.252count[26]_GND_1_o_equal_2_o<26>SLICE_X14Y41.CLKTah0.190LED1_OBUFLED1_rstpotLED10.5300.2840.814CLK_BUFGP65.134.90.954count_17LED10.9540.0000.0000.000count_17LED12SLICE_X15Y42.CLKCLK_BUFGPSLICE_X15Y42.CQTcko0.198count<18>count_17SLICE_X14Y41.C5net30.172count<17>SLICE_X14Y41.CTilo0.142LED1_OBUFcount[26]_GND_1_o_equal_2_o<26>1SLICE_X14Y41.A1net130.252count[26]_GND_1_o_equal_2_o<26>SLICE_X14Y41.CLKTah0.190LED1_OBUFLED1_rstpotLED10.5300.4240.954CLK_BUFGP55.644.41.006count_15LED11.0060.0000.0000.000count_15LED12SLICE_X15Y42.CLKCLK_BUFGPSLICE_X15Y42.AQTcko0.198count<18>count_15SLICE_X14Y41.C4net30.224count<15>SLICE_X14Y41.CTilo0.142LED1_OBUFcount[26]_GND_1_o_equal_2_o<26>1SLICE_X14Y41.A1net130.252count[26]_GND_1_o_equal_2_o<26>SLICE_X14Y41.CLKTah0.190LED1_OBUFLED1_rstpotLED10.5300.4761.006CLK_BUFGP52.747.3Component Switching Limit Checks: NET "CLK_BUFGP/IBUFG" PERIOD = 31.25 ns HIGH 50%;0CLKCLK3.695000090102113.695270.636Tue Feb 21 22:17:03 2017 TraceTrace Settings Peak Memory Usage: 390 MB