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authorJustus Fasse <justus.fasse@etu.univ-grenoble-alpes.fr>2021-08-02 12:51:18 +0200
committerJustus Fasse <justus.fasse@etu.univ-grenoble-alpes.fr>2021-08-02 12:51:18 +0200
commit88d049f22799ff6578d3773e066c6b7277ceeacd (patch)
tree5fc97f5b1d2867bd4e91f502b8cd4c781782ea8b
parent1caef068c35f84e7b911ef6f3d7d7e84085c62ab (diff)
downloadcompcert-kvx-88d049f22799ff6578d3773e066c6b7277ceeacd.tar.gz
compcert-kvx-88d049f22799ff6578d3773e066c6b7277ceeacd.zip
Scheduling function that can select the dependency calculation
Mostly copy-pasted from RTLpathScheduleraux and PrepassSchedulingOracle
-rw-r--r--scheduling/MyRTLpathScheduleraux.ml84
1 files changed, 84 insertions, 0 deletions
diff --git a/scheduling/MyRTLpathScheduleraux.ml b/scheduling/MyRTLpathScheduleraux.ml
index fd5583bd..f86f2cde 100644
--- a/scheduling/MyRTLpathScheduleraux.ml
+++ b/scheduling/MyRTLpathScheduleraux.ml
@@ -576,6 +576,90 @@ let is_store = function
| Istore _ -> true
| _ -> false
+type heuristic_mode =
+ | Default
+ | Ignore_liveness
+ | Move_stores
+
+let ideal_schedule'' sb code mode =
+ let old_debug_flag = !debug_flag in
+
+ let dep_function = match mode with
+ | Default -> PrepassSchedulingOracle.get_simple_dependencies
+ | Ignore_liveness -> PrepassSchedulingOracle.get_fake_deps_liveness
+ | Move_stores -> PrepassSchedulingOracle.get_fake_deps_liveness_stores
+ in
+
+ (* copy-paste from RTLpathScheduleraux.schedule_superblock *)
+ let nr_instr = Array.length sb.instructions in
+ let trailer_length =
+ match PTree.get (sb.instructions.(nr_instr-1)) code with
+ | None -> 0
+ | Some ii ->
+ match predicted_successor ii with
+ | Some _ -> 0
+ | None -> 1 in
+ let live_regs_entry = RTLpathScheduleraux.get_live_regs_entry sb code in
+ let seqa =
+ Array.map (fun i ->
+ (match PTree.get i code with
+ | Some ii -> ii
+ | None -> failwith "RTLpathScheduleraux.schedule_superblock"),
+ (match PTree.get i sb.liveins with
+ | Some s -> s
+ | None -> Regset.empty))
+ (Array.sub sb.instructions 0 (nr_instr-trailer_length))
+ in
+ let nr_scheduled_instr = nr_instr - trailer_length in
+ (* Copy-pasted from PrepassSchedulingOracle.schedule_sequence *)
+ let opweights = OpWeights.get_opweights () in
+ (* NB: Early exit *)
+ if (Array.length seqa) <= 1 then None else
+ (* Copy-pasted from PrepassSchedulingOracle.define_problem *)
+ let problem =
+ let deps = dep_function opweights seqa in
+ debug_flag := false;
+ debug "Fake deps:\n";
+ if !debug_flag then (
+ deps
+ |> List.iter (fun {InstructionScheduler.instr_from; instr_to; latency} ->
+ debug "%2d depends on %2d\n" (Camlcoq.P.to_int sb.instructions.(instr_to)) (Camlcoq.P.to_int sb.instructions.(instr_from)));
+ flush_all ();
+ );
+ { InstructionScheduler.max_latency = -1
+ ; resource_bounds = opweights.PrepassSchedulingOracleDeps.pipelined_resource_bounds
+ ; live_regs_entry = live_regs_entry
+ ; typing = sb.typing
+ ; reference_counting = Option.some @@ RTLpathScheduleraux.reference_counting seqa sb.s_output_regs sb.typing
+ ; instruction_usages = Array.map (PrepassSchedulingOracle.resources_of_instruction opweights) (Array.map fst seqa)
+ ; latency_constraints = deps }
+ in
+ match PrepassSchedulingOracle.prepass_scheduler_by_name
+ (!Clflags.option_fprepass_sched)
+ problem
+ (Array.map (fun (ins, _) ->
+ match ins with
+ | Icond _ -> true
+ | _ -> false) seqa)
+ with
+ | None ->
+ debug_flag := old_debug_flag;
+ failwith "no solution in prepass scheduling\n"
+ | Some solution ->
+ let positions = Array.init nr_scheduled_instr (fun i -> i) in
+ let final_time = solution.(nr_scheduled_instr) in
+ Array.sort (fun i j ->
+ let si = solution.(i) and sj = solution.(j) in
+ if si < sj then -1
+ else if si > sj then 1
+ else i - j) positions;
+
+ let ins' =
+ Array.append
+ (Array.map (fun i -> sb.instructions.(i)) positions)
+ (Array.sub sb.instructions (nr_instr - trailer_length) trailer_length) in
+ Some (ins', final_time)
+
(* Improved scheduling heuristic which allows moving memory writes downwards by turning
* Iconds into Ocmps for the purpose of dependency calculations. *)
let ideal_schedule' sb code ~next_free_reg =