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| author | David Monniaux <david.monniaux@univ-grenoble-alpes.fr> | 2019-03-18 10:33:39 +0100 |
|---|---|---|
| committer | David Monniaux <david.monniaux@univ-grenoble-alpes.fr> | 2019-03-18 10:33:39 +0100 |
| commit | 6ecca2e4797af8effde673b8f188d562fdfc89a6 (patch) | |
| tree | 3a80cc3920de92350d81c7d35ca5ff7f8a33f1ad /mppa_k1c/TargetPrinter.ml | |
| parent | 2ef85f12a76c1d730324001c8cc62b4d8828a109 (diff) | |
| download | compcert-kvx-6ecca2e4797af8effde673b8f188d562fdfc89a6.tar.gz compcert-kvx-6ecca2e4797af8effde673b8f188d562fdfc89a6.zip | |
some more about andn/orn
Diffstat (limited to 'mppa_k1c/TargetPrinter.ml')
| -rw-r--r-- | mppa_k1c/TargetPrinter.ml | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/mppa_k1c/TargetPrinter.ml b/mppa_k1c/TargetPrinter.ml index d30d62a2..c3de5206 100644 --- a/mppa_k1c/TargetPrinter.ml +++ b/mppa_k1c/TargetPrinter.ml @@ -380,6 +380,10 @@ module Target (*: TARGET*) = fprintf oc " xorw %a = %a, %a\n" ireg rd ireg rs1 ireg rs2 | Pnxorw (rd, rs1, rs2) -> fprintf oc " nxorw %a = %a, %a\n" ireg rd ireg rs1 ireg rs2 + | Pandnw (rd, rs1, rs2) -> + fprintf oc " andnw %a = %a, %a\n" ireg rd ireg rs1 ireg rs2 + | Pornw (rd, rs1, rs2) -> + fprintf oc " ornw %a = %a, %a\n" ireg rd ireg rs1 ireg rs2 | Psraw (rd, rs1, rs2) -> fprintf oc " sraw %a = %a, %a\n" ireg rd ireg rs1 ireg rs2 | Psrlw (rd, rs1, rs2) -> @@ -403,6 +407,10 @@ module Target (*: TARGET*) = fprintf oc " xord %a = %a, %a\n" ireg rd ireg rs1 ireg rs2 | Pnxorl (rd, rs1, rs2) -> assert Archi.ptr64; fprintf oc " nxord %a = %a, %a\n" ireg rd ireg rs1 ireg rs2 + | Pandnl (rd, rs1, rs2) -> + fprintf oc " andnd %a = %a, %a\n" ireg rd ireg rs1 ireg rs2 + | Pornl (rd, rs1, rs2) -> + fprintf oc " ornd %a = %a, %a\n" ireg rd ireg rs1 ireg rs2 | Pmull (rd, rs1, rs2) -> fprintf oc " muld %a = %a, %a\n" ireg rd ireg rs1 ireg rs2 | Pslll (rd, rs1, rs2) -> @@ -442,6 +450,10 @@ module Target (*: TARGET*) = fprintf oc " xorw %a = %a, %a\n" ireg rd ireg rs coqint imm | Pnxoriw (rd, rs, imm) -> fprintf oc " nxorw %a = %a, %a\n" ireg rd ireg rs coqint imm + | Pandniw (rd, rs, imm) -> + fprintf oc " andnw %a = %a, %a\n" ireg rd ireg rs coqint imm + | Porniw (rd, rs, imm) -> + fprintf oc " ornw %a = %a, %a\n" ireg rd ireg rs coqint imm | Psraiw (rd, rs, imm) -> fprintf oc " sraw %a = %a, %a\n" ireg rd ireg rs coqint imm | Psrliw (rd, rs, imm) -> @@ -475,6 +487,10 @@ module Target (*: TARGET*) = fprintf oc " xord %a = %a, %a\n" ireg rd ireg rs coqint64 imm | Pnxoril (rd, rs, imm) -> assert Archi.ptr64; fprintf oc " nxord %a = %a, %a\n" ireg rd ireg rs coqint64 imm + | Pandnil (rd, rs, imm) -> + fprintf oc " andnd %a = %a, %a\n" ireg rd ireg rs coqint imm + | Pornil (rd, rs, imm) -> + fprintf oc " ornd %a = %a, %a\n" ireg rd ireg rs coqint imm let get_section_names name = let (text, lit) = |