aboutsummaryrefslogtreecommitdiffstats
path: root/aarch64/Asmgen.v
diff options
context:
space:
mode:
Diffstat (limited to 'aarch64/Asmgen.v')
-rw-r--r--aarch64/Asmgen.v11
1 files changed, 8 insertions, 3 deletions
diff --git a/aarch64/Asmgen.v b/aarch64/Asmgen.v
index 875f3fd1..0c72c7cc 100644
--- a/aarch64/Asmgen.v
+++ b/aarch64/Asmgen.v
@@ -962,8 +962,12 @@ Definition transl_addressing (sz: Z) (addr: Op.addressing) (args: list mreg)
(** Translation of loads and stores *)
-Definition transl_load (chunk: memory_chunk) (addr: Op.addressing)
+Definition transl_load (trap: trapping_mode)
+ (chunk: memory_chunk) (addr: Op.addressing)
(args: list mreg) (dst: mreg) (k: code) : res code :=
+ match trap with
+ | NOTRAP => Error (msg "Asmgen.transl_load non-trapping loads unsupported on aarch64")
+ | TRAP =>
match chunk with
| Mint8unsigned =>
do rd <- ireg_of dst; transl_addressing 1 addr args (Pldrb W rd) k
@@ -985,6 +989,7 @@ Definition transl_load (chunk: memory_chunk) (addr: Op.addressing)
do rd <- ireg_of dst; transl_addressing 4 addr args (Pldrw_a rd) k
| Many64 =>
do rd <- ireg_of dst; transl_addressing 8 addr args (Pldrx_a rd) k
+ end
end.
Definition transl_store (chunk: memory_chunk) (addr: Op.addressing)
@@ -1068,8 +1073,8 @@ Definition transl_instr (f: Mach.function) (i: Mach.instruction)
OK (if r29_is_parent then c else loadptr XSP f.(fn_link_ofs) X29 c)
| Mop op args res =>
transl_op op args res k
- | Mload chunk addr args dst =>
- transl_load chunk addr args dst k
+ | Mload trap chunk addr args dst =>
+ transl_load trap chunk addr args dst k
| Mstore chunk addr args src =>
transl_store chunk addr args src k
| Mcall sig (inl r) =>