diff options
Diffstat (limited to 'aarch64/PrepassSchedulingOracle.ml')
-rw-r--r-- | aarch64/PrepassSchedulingOracle.ml | 21 |
1 files changed, 15 insertions, 6 deletions
diff --git a/aarch64/PrepassSchedulingOracle.ml b/aarch64/PrepassSchedulingOracle.ml index ce34b1fd..6dc8711e 100644 --- a/aarch64/PrepassSchedulingOracle.ml +++ b/aarch64/PrepassSchedulingOracle.ml @@ -277,6 +277,10 @@ let get_fake_deps_liveness (opweights : opweights) (seqa : (instruction*Regset.t last_reg_reads := PTree.set reg (i :: get_last_reads reg) !last_reg_reads + and add_reg_read i reg = + last_reg_reads := PTree.set reg + (i :: get_last_reads reg) + !last_reg_reads and add_output_reg i latency reg = begin (* Write after write *) @@ -330,9 +334,9 @@ let get_fake_deps_liveness (opweights : opweights) (seqa : (instruction*Regset.t begin fun i (insn, other_uses) -> (* TODO? Perhaps the liveness info should be preserved for the final instruction? *) - (* List.iter (fun use -> - add_input_reg i use) - (Regset.elements other_uses); *) + List.iter (fun use -> + add_reg_read i use) + (Regset.elements other_uses); match insn with | Inop _ -> () @@ -474,6 +478,10 @@ let get_fake_deps_liveness_stores (opweights : opweights) (seqa : (instruction*R last_reg_reads := PTree.set reg (i :: get_last_reads reg) !last_reg_reads + and add_reg_read i reg = + last_reg_reads := PTree.set reg + (i :: get_last_reads reg) + !last_reg_reads and add_output_reg i latency reg = begin (* Write after write *) @@ -526,10 +534,11 @@ let get_fake_deps_liveness_stores (opweights : opweights) (seqa : (instruction*R Array.iteri begin fun i (insn, other_uses) -> - (* Ignore liveness + (* Ignore liveness, but treat as register read so that instructions are not + * incorrectly moved up, something we do not compensate. *) List.iter (fun use -> - add_input_reg i use) - (Regset.elements other_uses); *) + add_reg_read i use) + (Regset.elements other_uses); match insn with | Inop _ -> () |