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| | | | * | | Merge branch 'kvx-sched-w-reg-press' of gricad-gitlab.univ-grenoble-alpes.fr:...David Monniaux2021-06-171-1/+2
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| | | | * \ \ \ Merge branch 'kvx-sched-w-reg-press' of gricad-gitlab.univ-grenoble-alpes.fr:...David Monniaux2021-06-170-0/+0
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| | | | * | | | | fix for Risc-VDavid Monniaux2021-06-172-0/+4
| | | | * | | | | Merge remote-tracking branch 'origin/kvx-work' into kvx-sched-w-reg-pressDavid Monniaux2021-06-1714-84/+221
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| | | * | | | | | | Changed default threshold value following testsnicolas.nardino2021-06-222-9/+3
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| | | * | | | | | changed type of schedule_seq in x86 for compatibilitynicolas.nardino2021-06-171-1/+2
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| | | * | | | | fix riscv/Machregsaux.mlinicolas.nardino2021-06-171-0/+2
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| | | * | | | Add option to set thresold and support for riscvnicolas.nardino2021-06-174-2/+12
| | | * | | | Now working, tests show a decrease in spillagenicolas.nardino2021-06-162-59/+61
| | | * | | | kinda fixednicolas.nardino2021-06-152-25/+57
| | | * | | | fixingnicolas.nardino2021-06-154-53/+139
| | | * | | | was very wrong, fixingnicolas.nardino2021-06-145-20/+80
| | | * | | | One fewer spill with new sched on `test/.../spille_forw.c`nicolas.nardino2021-06-141-3/+50
| | | * | | | scheduler written, need to test nownicolas.nardino2021-06-142-18/+68
| | | * | | | work on the schedulernicolas.nardino2021-06-124-41/+114
| | | * | | | Work on new schedluernicolas.nardino2021-06-109-16/+165
| | | * | | | Fix RTLpathScheduleraux.get_live_regs_entrynicolas.nardino2021-06-081-2/+3
| | | * | | | Another test : one spill when scheduled forward, none if notnicolas.nardino2021-06-081-0/+119
| | | * | | | Add some testsnicolas.nardino2021-06-084-3/+133
| | | * | | | Adding debug infonicolas.nardino2021-06-061-42/+53
| | | * | | | Fixing scope error, and non-exhaustive pattern matchingnicolas.nardino2021-06-061-5/+6
| | | * | | | function written, now needs testingnicolas.nardino2021-06-051-10/+40
| | | * | | | computing live regs at sb entry from its live output regsnicolas.nardino2021-06-042-6/+24
| | | * | | | Passing info of live regs to scheduler: beginningnicolas.nardino2021-06-045-2/+17
| | * | | | | use regpres_bis not regpresDavid Monniaux2021-07-191-1/+1
| | * | | | | disable printing debug infoDavid Monniaux2021-07-191-1/+1
| | * | | | | debugprint flag not to trueDavid Monniaux2021-07-191-7/+0
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| * | | | | Change "Tunneling" to "LTLTunneling" everywherePierre Goutagny2021-06-1710-14/+14
| * | | | | Use Tunnelinglibs in TunnelingauxPierre Goutagny2021-06-171-256/+81
| * | | | | Simplify tunneling factorisationPierre Goutagny2021-06-172-168/+173
| * | | | | Use Tunnelinglibs in RTLTunnelingauxPierre Goutagny2021-06-162-265/+123
| * | | | | Add Tunneling factorisation modulePierre Goutagny2021-06-161-0/+237
| * | | | | Move rtl_tunneling to a more interesting placePierre Goutagny2021-06-151-1/+1
| * | | | | Factorise RTL Tunneling pass in compiler_expandPierre Goutagny2021-06-151-1/+3
| * | | | | Add RTL Tunneling as a passPierre Goutagny2021-06-143-1/+8
| * | | | | Add the RTLTunneling oraclePierre Goutagny2021-06-141-0/+284
| * | | | | Complete RTLTunnelingproofPierre Goutagny2021-06-111-16/+66
| * | | | | Complete `tunnel_step_correct` proof up to IjumptablePierre Goutagny2021-06-101-9/+227
| * | | | | Starts proof for `tunnel_step_correct`Pierre Goutagny2021-06-091-15/+120
| * | | | | Monday's work on RTLTunnelingproofPierre Goutagny2021-06-071-31/+153
| * | | | | Add RTLTunnelingproof.vPierre Goutagny2021-06-042-1/+171
| * | | | | Fix check_instr Icond target conditionsPierre Goutagny2021-06-041-2/+2
| * | | | | Write RTLTunneling.vPierre Goutagny2021-06-031-0/+125
| * | | | | Add RTLTunneling.vPierre Goutagny2021-06-032-0/+1
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* | | | | Modified logic to detect inner loops spanned by a superblockJustus Fasse2021-08-171-3/+10
* | | | | Remove done TODO commentJustus Fasse2021-08-171-2/+2
* | | | | Work-around for prepass-past-side-exits error.Justus Fasse2021-08-171-11/+17
* | | | | Make warning about worse schedule with relaxed problem non-fatal unlessJustus Fasse2021-08-171-1/+3
* | | | | Issue warning when idealized final time is larger than default finalJustus Fasse2021-08-171-2/+6
* | | | | Make specifying of prepass past side exits heuristic optionalJustus Fasse2021-08-171-0/+1
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