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| * | | select through bitwise operationsDavid Monniaux2021-01-301-0/+40
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* | | Try to save values in virtual registers during expansionLéo Gourdin2021-03-013-95/+118
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* | | Proofs finished for expansionLéo Gourdin2021-03-013-41/+68
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* | | Debugging fake values finishedLéo Gourdin2021-03-013-24/+39
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* | | proof of fsval_proj_correctSylvain Boulmé2021-03-011-7/+27
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* | | Merge remote-tracking branch 'origin/riscv-work-rules' into riscv-workLéo Gourdin2021-03-011-4/+4
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| * | | bug fix ?Sylvain Boulmé2021-03-011-4/+4
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* | | | some bugfixLéo Gourdin2021-03-012-15/+20
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* | | | Proof of fsval condition cmp okLéo Gourdin2021-03-019-1138/+545
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* | | | [Admitted checker] Some more proof, version with buggy addirw0Léo Gourdin2021-02-252-23/+128
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* | | | some more proof for fake hsval checker expansionsLéo Gourdin2021-02-253-370/+772
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* | | | [Intermediate] Adding fake hsval for Ccomp expansionLéo Gourdin2021-02-234-171/+180
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* | | | Fix importsLéo Gourdin2021-02-231-1/+1
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* | | | Merge remote-tracking branch 'origin/riscv-work-rules' into riscv-workLéo Gourdin2021-02-239-80/+223
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| * | | Merge branch 'riscv-work-rules' of ↵Léo Gourdin2021-02-231-2/+52
| |\ \ \ | | | | | | | | | | | | | | | gricad-gitlab.univ-grenoble-alpes.fr:sixcy/CompCert into riscv-work-rules
| | * | | add target_cbranch_expanseSylvain Boulmé2021-02-231-2/+52
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| * | | | Separate target_op_simplify for riscVLéo Gourdin2021-02-233-19/+22
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| * | | fix commentsSylvain Boulmé2021-02-231-2/+5
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| * | | starting an interface for target rewriting rules.Sylvain Boulmé2021-02-231-9/+130
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| * | | improved pre_output_regsSylvain Boulmé2021-02-221-5/+8
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| * | | a bit more cleaningSylvain Boulmé2021-02-225-44/+21
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| * | | quick fixcommentsLéo Gourdin2021-02-162-5/+2
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* | | | others case for ccompimmLéo Gourdin2021-02-231-53/+51
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* | | | Some more proofs on branch expansion, using make_immed32_soundLéo Gourdin2021-02-231-59/+221
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* | | | Branch expansions activated and configured in the checker (but admitted) and ↵Léo Gourdin2021-02-192-54/+152
| | | | | | | | | | | | | | | | bugfix in the expansion liveness modification
* | | | Proof of Ocmp expansions without immediate and some drafts in commentLéo Gourdin2021-02-183-52/+477
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* | | | fix bug in mergeLéo Gourdin2021-02-161-1/+1
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* | | | Merge remote-tracking branch 'origin/CompCert_RTLpath_simuX' into riscv-workLéo Gourdin2021-02-1610-228/+406
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| * | | This commit gives a first try to compute pre_output_regs from the livenesss ↵Léo Gourdin2021-02-151-10/+19
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| * | | [Broken version] Some TODO eliminatedLéo Gourdin2021-02-153-153/+15
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| * | | [Broken version] Proof of hsistate_simu_spec_correctLéo Gourdin2021-02-151-7/+10
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| * | | [Broken version] Intermediate local commit: pre_output_regs_correct provedLéo Gourdin2021-02-151-17/+28
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| * | | [Broken version] Intermediate local commit: proof of siexec_snone_por in ↵Léo Gourdin2021-02-122-18/+68
| | | | | | | | | | | | | | | | scheduler proof
| * | | [Broken version] Intermediate local commit: proof of inst_checker_eqlive OKLéo Gourdin2021-02-122-54/+131
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| * | | progress in pre_output_regs_correctSylvain Boulmé2021-02-121-5/+53
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| * | | improve the skeleton...Sylvain Boulmé2021-02-112-26/+107
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| * | | refactorize inst_checker for checking pre_output_regsSylvain Boulmé2021-02-112-31/+98
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| * | | specification of pre_output_regs for the simulation checkerSylvain Boulmé2021-02-116-125/+107
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| * | | Merge branch 'CompCert_RTLpath_simuX' into kvx-workSylvain Boulmé2021-02-103-5/+193
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| | * | | factorize lazy_and_Some_* lemmasSylvain Boulmé2021-02-101-16/+3
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| * | | | insert CSE after constant propagation and before CSE2Sylvain Boulmé2021-02-101-0/+1
| | |_|/ | |/| | | | | | | | | | => useful to have a nice generated code for || (and also probably &&)
* | | | Adding a compiler option -fexpanse-rtlcondLéo Gourdin2021-02-163-1/+5
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* | | | [Admitted checker] Some more proof draftLéo Gourdin2021-02-111-97/+272
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* | | | [Admitted checker] Duplicating Asm Ceq/Cne and draft checker proofLéo Gourdin2021-02-119-116/+568
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* | | | [Admitted checker] Adding cbranch expansions (without scratch) to the checkerLéo Gourdin2021-02-103-8/+100
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* | | | [Admitted checker] Checker expansion for reg Ocmp (without scratch)Léo Gourdin2021-02-107-62/+303
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* | | | Adding pathmap psize modification during expansion oracleLéo Gourdin2021-02-082-14/+25
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* | | | Merge remote-tracking branch 'origin/CompCert_RTLpath_simuX' into riscv-workLéo Gourdin2021-02-085-15/+215
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| * | | Merge branch 'CompCert_RTLpath_simuX' of ↵Léo Gourdin2021-02-080-0/+0
| |\ \ \ | | | | | | | | | | | | | | | gricad-gitlab.univ-grenoble-alpes.fr:sixcy/CompCert into CompCert_RTLpath_simuX
| | * | | Checker for wellformed pathLéo Gourdin2021-02-081-2/+175
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