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| * | | Adding a flag to test fp_init_expLéo Gourdin2021-03-023-150/+159
| * | | Adding fp init expansionsLéo Gourdin2021-03-022-3/+18
| * | | Merge remote-tracking branch 'origin/riscv-still-asmcondexp' into riscv-work-...Léo Gourdin2021-03-023-96/+1088
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| | * | | Asmcondexp branche useful to benchmark expansionsLéo Gourdin2021-03-023-96/+1088
| * | | | [Admitted checker] Oracle expansion for float/float32 constant initLéo Gourdin2021-03-024-10/+31
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* / | | adding test for load replacement on a64Léo Gourdin2021-03-294-0/+61
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* / / fix ci ?Léo Gourdin2021-03-0211-1/+68
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* | Merge conflicts solved and cleaning in Asmgenproof after expansionLéo Gourdin2021-03-024-1148/+106
* | Merge remote-tracking branch 'origin/riscV-cmov' into riscv-workLéo Gourdin2021-03-0219-20/+705
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| * | Adding missing operators in PrintOp for debuggingLéo Gourdin2021-02-251-0/+5
| * | écrase X31riscV-cmovDavid Monniaux2021-02-031-1/+2
| * | Merge remote-tracking branch 'origin/kvx-work' into riscV-cmovDavid Monniaux2021-02-031-1/+1
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| * | | no branchless by defaultDavid Monniaux2021-02-021-1/+1
| * | | detect redundant cmovDavid Monniaux2021-02-022-3/+34
| * | | fix code generation for select(b, r, r)David Monniaux2021-02-021-2/+7
| * | | fix problem if rt = rfDavid Monniaux2021-02-021-6/+8
| * | | example of cmovDavid Monniaux2021-02-021-0/+28
| * | | Cmov TsingleDavid Monniaux2021-02-023-33/+43
| * | | implement for another register configurationDavid Monniaux2021-02-021-1/+8
| * | | make branchless the defaultDavid Monniaux2021-02-021-1/+1
| * | | some more cases implementedDavid Monniaux2021-02-021-12/+25
| * | | PselectdDavid Monniaux2021-02-023-0/+33
| * | | cmov on integersDavid Monniaux2021-02-023-11/+110
| * | | begin synthesizing selectDavid Monniaux2021-02-023-2/+34
| * | | asmgen OselectlDavid Monniaux2021-02-022-0/+11
| * | | begin implementing selectDavid Monniaux2021-02-028-6/+114
| * | | select01_longDavid Monniaux2021-02-011-130/+10
| * | | repr etc.David Monniaux2021-02-011-4/+2
| * | | bitwise_select_value_correctDavid Monniaux2021-02-011-0/+12
| * | | int64_of_value some moreDavid Monniaux2021-02-011-14/+15
| * | | int64_of_valueDavid Monniaux2021-02-011-0/+77
| * | | Asmgen for bits / floatDavid Monniaux2021-02-011-0/+13
| * | | bits to floatDavid Monniaux2021-02-019-5/+82
| * | | fix Makefile / configureDavid Monniaux2021-02-011-0/+6
| * | | adding builtinsDavid Monniaux2021-02-014-6/+27
| * | | Obits_of_single etcDavid Monniaux2021-02-013-3/+46
| * | | define some semantics in AsmDavid Monniaux2021-02-012-3/+24
| * | | add has_type infoDavid Monniaux2021-01-311-1/+3
| * | | has_type_bDavid Monniaux2021-01-301-0/+21
| * | | select_longDavid Monniaux2021-01-301-0/+38
| * | | select through bitwise operationsDavid Monniaux2021-01-301-0/+40
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* | | Try to save values in virtual registers during expansionLéo Gourdin2021-03-013-95/+118
* | | Proofs finished for expansionLéo Gourdin2021-03-013-41/+68
* | | Debugging fake values finishedLéo Gourdin2021-03-013-24/+39
* | | proof of fsval_proj_correctSylvain Boulmé2021-03-011-7/+27
* | | Merge remote-tracking branch 'origin/riscv-work-rules' into riscv-workLéo Gourdin2021-03-011-4/+4
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| * | | bug fix ?Sylvain Boulmé2021-03-011-4/+4
* | | | some bugfixLéo Gourdin2021-03-012-15/+20
* | | | Proof of fsval condition cmp okLéo Gourdin2021-03-019-1138/+545
* | | | [Admitted checker] Some more proof, version with buggy addirw0Léo Gourdin2021-02-252-23/+128
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