| Commit message (Collapse) | Author | Age | Files | Lines | ||
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| * | aarch64/Asmblock: Merge PArithComparisonRR and PArithComparisonFF | Justus Fasse | 2020-07-06 | 1 | -21/+11 | |
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| * | aarch64/Asmblock: Merge RR, RF, FR, FF, RspRsp | Justus Fasse | 2020-07-06 | 1 | -85/+41 | |
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| * | aarch64/Asmblock: Merge arith_comparison_(r|f) | Justus Fasse | 2020-07-06 | 1 | -26/+12 | |
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| * | aarch64/Asmblock: Switch arith_c_r to arith_c_p for consistency | Justus Fasse | 2020-07-06 | 1 | -4/+4 | |
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| * | aarch64/Asmblock: Merge arith_r and arith_f into arith_p | Justus Fasse | 2020-07-06 | 1 | -19/+10 | |
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| * | aarch64/Asmblock: Change preg to simplify preg-ification | Justus Fasse | 2020-07-06 | 1 | -10/+12 | |
| | | | | | | | | | | | | | | Since ireg and iregsp coerces to preg, and iregsp subsumes ireg define preg's IR constructor with iregsp and remove SP. This is the first step in the "preg-ification" of aarch64/Asmblock. The goal is to unify instructions that only differ in the types of registers they use. That is, we want to group together instructions e.g. `rd <- op r1 ...` even if r1 is ireg for one op and freg for another operation. (NB: This currently excludes operations that use ireg0 which will are and will be grouped separately for now.) | |||||
| * | Asmblock: Rename arith_name_<...> -> arith_name_<...> | Justus Fasse | 2020-07-05 | 1 | -62/+62 | |
| | | | | | | Following the example of 6fd50b46 where arith_name_r was renamed to arith_r | |||||
| * | Asmblock: Use i as variable name for instructions | Justus Fasse | 2020-07-05 | 1 | -73/+73 | |
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| * | Asmblock: Add instructions with conditional execution | Justus Fasse | 2020-07-05 | 1 | -6/+41 | |
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| * | Asmblock: PArithWRR0I -> PArithWRR0, PArithXRR0I -> PArithXRR0 | Justus Fasse | 2020-07-04 | 1 | -22/+22 | |
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| * | Asmblock: Merge PArithFF32 and PArithFF64 into PArithF | Justus Fasse | 2020-07-04 | 1 | -19/+9 | |
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| * | Asmblock: Add TODO for instructions I had previously forgotten | Justus Fasse | 2020-07-04 | 1 | -0/+3 | |
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| * | Asmblock: PArithRspRspI -> PArithRspRsp | Justus Fasse | 2020-07-04 | 1 | -11/+11 | |
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| * | Asmblock: PArithComparisonRI -> PArithComparisonR | Justus Fasse | 2020-07-04 | 1 | -17/+17 | |
| | | | | | | Reflects the fact that immediates are not really relevant as scheduling dependencies. | |||||
| * | fixing type of PLoad and PStore | Sylvain Boulmé | 2020-07-03 | 1 | -3/+3 | |
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| * | Merging arith_name_r and arith_name_ri into arith_r | Sylvain Boulmé | 2020-07-03 | 1 | -24/+18 | |
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| * | Asmblock: Add floating-point load and stores | Justus Fasse | 2020-07-02 | 1 | -4/+24 | |
| | | | | | | | Since exec_load and exec_store are defined with preg (not ireg or freg) I simply appended the floating point instructions to the already defined types and functions. | |||||
| * | Asmblock: First attempt at completing PArith/ar_instruction/... | Justus Fasse | 2020-07-02 | 1 | -38/+626 | |
| | | | | | | Pmovk is currently missing. (Pmovk aloways uses a register as both source and desintation) | |||||
| * | aarch64/Asmblock: Add PStore, based on PLoad | Justus Fasse | 2020-06-28 | 1 | -1/+28 | |
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| * | fix linker model in Asmblock | Sylvain Boulmé | 2020-06-22 | 1 | -30/+10 | |
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| * | [WIP: Coq compilation broken] Stub for Asmgen | Sylvain Boulmé | 2020-06-21 | 1 | -5/+9 | |
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| * | Skeleton of Asmblock | Sylvain Boulmé | 2020-06-20 | 1 | -82/+136 | |
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| * | start aarch64/Asmblock (work-in-progress) | Sylvain Boulmé | 2020-06-19 | 1 | -0/+1546 | |
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index : compcert-kvx | |
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