Commit message (Collapse) | Author | Age | Files | Lines | |
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* | disable leaf function removal of return address restoration due to memcpy ↵ | David Monniaux | 2020-03-27 | 1 | -2/+5 |
| | | | | overwriting the return address register | ||||
* | Merge branch 'dm-leaf' of https://github.com/monniaux/CompCert into mppa-work | David Monniaux | 2020-03-27 | 1 | -2/+4 |
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| * | removed RA restoration | David Monniaux | 2020-03-25 | 1 | -2/+4 |
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* | | Merge branch 'dm-div2' of https://github.com/monniaux/CompCert into mppa-work | David Monniaux | 2020-01-15 | 1 | -8/+14 |
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| * | | 2-instruction signed division by two on Aarch64 | David Monniaux | 2020-01-15 | 1 | -8/+14 |
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* | | Merge branch 'master' of https://github.com/AbsInt/CompCert into ↵ | David Monniaux | 2019-12-09 | 1 | -1/+6 |
|\| | | | | | | | mppa-work-upstream-merge | ||||
| * | Fix for AArch64 alignment problem (#206) | Bernhard Schommer | 2019-11-28 | 1 | -1/+6 |
| | | | | | | | | | | | | | | | | | | In addressing modes for load and store instructions, the offset must be a multiple of the memory size being accessed. When accessing global variables, this may not be the case if the alignment of the variable is less than its size. Errors occur at link time. This PR extends the check for a representable offset for the addressing of global variables to also check whether the variable is correctly aligned. Only if both conditions are met can we generate the short sequence Padrp / ADadr. Otherwise we go through the generic loadsymbol sequence. | ||||
* | | Merge tag 'v3.6_mppa_2019-09-20' of ↵ | David Monniaux | 2019-09-20 | 1 | -3/+8 |
|/ | | | | gricad-gitlab.univ-grenoble-alpes.fr:sixcy/CompCert into mppa-non-trapping-load | ||||
* | AArch64 port | Xavier Leroy | 2019-08-08 | 1 | -0/+1151 |
This commit adds a back-end for the AArch64 architecture, namely ARMv8 in 64-bit mode. |