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* CSE3 generate lists of killableDavid Monniaux2020-03-051-1/+1
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* streamlined lattice codeDavid Monniaux2020-03-051-0/+1
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* Merge branch 'mppa-cse2' of ↵David Monniaux2020-03-036-37/+138
|\ | | | | | | gricad-gitlab.univ-grenoble-alpes.fr:sixcy/CompCert into mppa-work
| * Merge remote-tracking branch 'origin/mppa-work' into mppa-cse2David Monniaux2020-02-142-0/+4
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| | * Added option -ftracelinearize which linearizes based on ifnot branchesCyril SIX2020-02-122-0/+4
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| * | Merge remote-tracking branch 'origin/mppa-work' into mppa-cse2David Monniaux2020-02-064-6/+18
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| | * Added flag to desactivate condition inversionCyril SIX2020-02-032-0/+4
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| | * Tail duplication optimization defaulting to offCyril SIX2020-01-272-2/+1
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| | * Added a flag to desactivate tail duplicationCyril SIX2020-01-274-6/+15
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| * | Merge branch 'dm-cse2' of /home/monniaux/progs/CompCert into mppa-cs2David Monniaux2020-01-284-11/+28
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| * | Added description for forward movesCyril SIX2020-01-171-0/+1
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| * | connect forward-moves to compilerDavid Monniaux2020-01-084-6/+20
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| * | finish mergeDavid Monniaux2019-12-021-31/+19
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| * | Merge remote-tracking branch 'origin/mppa-work' into mppa-non-trapping-loadDavid Monniaux2019-12-021-5/+25
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| | * \ [regression to check!] Merge tag 'v3.6' into mppa-workCyril SIX2019-10-162-1/+2
| | |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: .gitignore backend/Lineartyping.v common/Values.v configure cparser/Machine.ml cparser/Machine.mli driver/Configuration.ml driver/Frontend.ml runtime/Makefile test/c/Makefile test/c/aes.c test/compression/Makefile test/regression/Makefile test/regression/extasm.c test/regression/floats-basics.c test/regression/floats.c Note : test/regression should be checked, didn't test it yet
| | * \ \ Merge branch 'mppa-work' into mppa-duplicate-rtlCyril SIX2019-10-021-1/+1
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| | * | | | Stubs for Duplicate passCyril SIX2019-09-031-28/+36
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| * | | | | Merge tag 'v3.6_mppa_2019-09-20' of ↵David Monniaux2019-09-202-1/+2
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | gricad-gitlab.univ-grenoble-alpes.fr:sixcy/CompCert into mppa-non-trapping-load
| | * | | | | fix compilingDavid Monniaux2019-09-201-0/+4
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| | * | | | | Merge tag 'v3.6' of https://github.com/AbsInt/CompCert into ↵David Monniaux2019-09-202-1/+2
| | |\ \ \ \ \ | | | |_|/ / / | | |/| | / / | | | | |/ / | | | |/| | mppa-work-upstream-merge
| * | | | | to v3.6David Monniaux2019-09-201-1/+5
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| * | | | | Merge remote-tracking branch 'origin/mppa-work' into mppa-non-trapping-loadDavid Monniaux2019-09-201-1/+1
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| | * | | | Timings for Machblockgen, Asmblockgen and postpass schedulingCyril SIX2019-09-181-1/+1
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| * / | | -fall-loads-nontrapDavid Monniaux2019-09-094-2/+16
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| * | | helpers broke compilationDavid Monniaux2019-07-191-4/+0
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| * | | Merge branch 'master' of https://github.com/AbsInt/CompCert into ↵David Monniaux2019-07-194-7/+11
| |\ \ \ | | | | | | | | | | | | | | | mppa-work-upstream-merge
| * | | | (#142) Desactivating scheduling when using -O1 optimizationCyril SIX2019-07-171-1/+3
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| * | | | Merge branch 'if-conversion' of https://github.com/AbsInt/CompCert into ↵David Monniaux2019-06-037-25/+62
| |\ \ \ \ | | | | | | | | | | | | | | | | | | mppa-if-conversion
| | * | | | If-conversion optimizationXavier Leroy2019-05-312-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Extends the instruction selection pass with an if-conversion optimization: some if/then/else statements are converted into "select" operations, which in turn can be compiled down to branchless instruction sequences if the target architecture supports them. The statements that are converted are of the form if (cond) { x = a1; } else { x = a2; } if (cond) { x = a1; } if (cond) { /*skip*/; } else { x = a2; } where a1, a2 are "safe" expressions, containing no operations that can fail at run-time, such as memory loads or integer divisions. A heuristic in backend/Selectionaux.ml controls when the optimization occurs, depending on command-line flags and the complexity of the "then" and "else" branches.
| * | | | | option -faddx (off by default until questions cleared)David Monniaux2019-05-113-5/+10
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| * | | | | Merge remote-tracking branch 'origin/mppa-peephole' into mppa-workDavid Monniaux2019-05-033-0/+5
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| | * | | | | -fcoalesce-memDavid Monniaux2019-05-033-0/+5
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| * | | | | | Renaming "dumb" scheduling into "greedy"Cyril SIX2019-05-031-1/+1
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| * | | | | Merge branch 'mppa-xsaddr' into mppa-workDavid Monniaux2019-05-023-0/+16
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| | * | | | | command line options (still incomplete)David Monniaux2019-05-023-0/+16
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| * | | | | | Setting fpostpass= optionCyril SIX2019-04-301-6/+8
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| * | | | | | The scheduler selection works, but the argument is not optional yet ↵Cyril SIX2019-04-292-3/+6
| |/ / / / / | | | | | | | | | | | | | | | | | | (-fpostpass nameofscheduler)
| * | | | | -fpostpass-ilpDavid Monniaux2019-03-122-4/+0
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| * | | | | Merge branch 'mppa_postpass' of ↵David Monniaux2019-03-122-0/+4
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | gricad-gitlab.univ-grenoble-alpes.fr:sixcy/CompCert into mppa_postpass
| | * | | | | Added cascaded_scheduler but the flag does not workCyril SIX2019-03-121-2/+3
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| | * | | | | Added a flag for changing the scheduler (not any choice available right now)Cyril SIX2019-03-123-0/+6
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| * | | | | | -fpostpass-ilpDavid Monniaux2019-03-122-0/+3
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| * | | | | Added long double = double by default on Kalray architectureCyril SIX2019-03-011-1/+1
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| * | | | | -O0 will not perform postpass schedulingCyril SIX2019-01-183-1/+7
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| * | | | | Compiles for x86 and mppa_k1c (except Asmexpandaux.ml)Sylvain Boulmé2018-11-271-1/+1
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| * | | | | BROKEN - works for x86, not for k1 anymoreCyril SIX2018-11-261-1/+1
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| * | | | | Moved some files to mppa_k1c/lib ; reworked configure and Makefile to allow thatCyril SIX2018-11-261-322/+0
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| * | | | | Merge tag 'v3.4' into mppa_k1cCyril SIX2018-11-219-93/+202
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| * | | | | | Rajout d'un return_address_offset. Besoin de changer forward_simu de mach ↵Cyril SIX2018-09-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | machblock
| * | | | | | Machblock: some renaming and proof simplificationsCyril SIX2018-09-061-15/+15
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