Commit message (Collapse) | Author | Age | Files | Lines | |
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* | bugfix | Léo Gourdin | 2021-04-08 | 1 | -0/+1 |
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* | Adding more expansions, improving miniCSE, and tuning prepass | Léo Gourdin | 2021-03-26 | 1 | -172/+162 |
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* | [Admitted checker] Duplicating Asm Ceq/Cne and draft checker proof | Léo Gourdin | 2021-02-11 | 1 | -0/+4 |
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* | Merge remote-tracking branch 'origin/CompCert_RTLpath_simuX' into riscv-work | Léo Gourdin | 2021-02-08 | 1 | -1/+1 |
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| * | fix OpWeights | David Monniaux | 2021-01-30 | 1 | -1/+1 |
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* | | cond and branches expanded | Léo Gourdin | 2021-02-06 | 1 | -1/+13 |
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* | allow changing the target core | David Monniaux | 2020-10-22 | 1 | -120/+159 |
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* | attempt at modeling Rocket | David Monniaux | 2020-10-22 | 1 | -0/+83 |
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* | so that all architectures compile | David Monniaux | 2020-10-02 | 1 | -8/+15 |
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* | wrong resources | David Monniaux | 2020-09-18 | 1 | -1/+1 |
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* | EH1 scheduling | David Monniaux | 2020-09-18 | 1 | -5/+18 |
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* | bogus OpWeights for Risc-V | David Monniaux | 2020-09-18 | 1 | -0/+19 |