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* bugfixLéo Gourdin2021-04-081-0/+1
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* Adding more expansions, improving miniCSE, and tuning prepassLéo Gourdin2021-03-261-172/+162
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* [Admitted checker] Duplicating Asm Ceq/Cne and draft checker proofLéo Gourdin2021-02-111-0/+4
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* Merge remote-tracking branch 'origin/CompCert_RTLpath_simuX' into riscv-workLéo Gourdin2021-02-081-1/+1
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| * fix OpWeightsDavid Monniaux2021-01-301-1/+1
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* | cond and branches expandedLéo Gourdin2021-02-061-1/+13
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* allow changing the target coreDavid Monniaux2020-10-221-120/+159
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* attempt at modeling RocketDavid Monniaux2020-10-221-0/+83
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* so that all architectures compileDavid Monniaux2020-10-021-8/+15
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* wrong resourcesDavid Monniaux2020-09-181-1/+1
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* EH1 schedulingDavid Monniaux2020-09-181-5/+18
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* bogus OpWeights for Risc-VDavid Monniaux2020-09-181-0/+19