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author | xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e> | 2012-03-29 11:57:33 +0000 |
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committer | xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e> | 2012-03-29 11:57:33 +0000 |
commit | 448cc3ff32cc60f4b9e78911404106797e109d90 (patch) | |
tree | 4dcea174d56a4984238d014c481c8d484d653007 /arm/Asm.v | |
parent | bf138748416195df13f68c097c750e1d388ac0de (diff) | |
download | compcert-448cc3ff32cc60f4b9e78911404106797e109d90.tar.gz compcert-448cc3ff32cc60f4b9e78911404106797e109d90.zip |
Support for fcmpzd instruction (float compare with +0.0)
git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@1858 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
Diffstat (limited to 'arm/Asm.v')
-rw-r--r-- | arm/Asm.v | 3 |
1 files changed, 3 insertions, 0 deletions
@@ -158,6 +158,7 @@ Inductive instruction : Type := | Pfsubd: freg -> freg -> freg -> instruction (**r float subtraction *) | Pflid: freg -> float -> instruction (**r load float constant *) | Pfcmpd: freg -> freg -> instruction (**r float comparison *) + | Pfcmpzd: freg -> instruction (**r float comparison with 0.0 *) | Pfsitod: freg -> ireg -> instruction (**r signed int to float *) | Pfuitod: freg -> ireg -> instruction (**r unsigned int to float *) | Pftosizd: ireg -> freg -> instruction (**r float to signed int *) @@ -501,6 +502,8 @@ Definition exec_instr (c: code) (i: instruction) (rs: regset) (m: mem) : outcome OK (nextinstr (rs#r1 <- (Vfloat f))) m | Pfcmpd r1 r2 => OK (nextinstr (compare_float rs rs#r1 rs#r2)) m + | Pfcmpzd r1 => + OK (nextinstr (compare_float rs rs#r1 (Vfloat Float.zero))) m | Pfsitod r1 r2 => OK (nextinstr (rs#r1 <- (Val.maketotal (Val.floatofint rs#r2)))) m | Pfuitod r1 r2 => |