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author | xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e> | 2012-12-29 16:55:38 +0000 |
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committer | xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e> | 2012-12-29 16:55:38 +0000 |
commit | 8539759095f95f2fbb680efc7633d868099114c8 (patch) | |
tree | 3401d7cd91686026090a21f600cf70ea4372ebf3 /backend/RTLgen.v | |
parent | 7e9c6fc9a51adc5e488c590d83c1e8ef5a256c9f (diff) | |
download | compcert-8539759095f95f2fbb680efc7633d868099114c8.tar.gz compcert-8539759095f95f2fbb680efc7633d868099114c8.zip |
Merge of the clightgen branch:
- Alternate semantics for Clight where function parameters are temporaries,
not variables
- New pass SimplLocals that turns non-addressed local variables into
temporaries
- Simplified Csharpminor, Cshmgen and Cminorgen accordingly
- SimplExpr starts its temporaries above variable names, therefoe
Cminorgen no longer needs to encode variable names and temps names.
- Simplified Cminor parser & printer, as well as Errors, accordingly.
- New tool clightgen to produce Clight AST in Coq-parsable .v files.
- Removed side condition "return type is void" on rules skip_seq
in the semantics of CompCert C, Clight, C#minor, Cminor.
- Adapted RTLgenproof accordingly (now uses a memory extension).
git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2083 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
Diffstat (limited to 'backend/RTLgen.v')
-rw-r--r-- | backend/RTLgen.v | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/backend/RTLgen.v b/backend/RTLgen.v index d3b99bbd..62df254b 100644 --- a/backend/RTLgen.v +++ b/backend/RTLgen.v @@ -319,7 +319,7 @@ Fixpoint add_vars (map: mapping) (names: list ident) Definition find_var (map: mapping) (name: ident) : mon reg := match PTree.get name map.(map_vars) with - | None => error (Errors.MSG "RTLgen: unbound variable " :: Errors.CTXL name :: nil) + | None => error (Errors.MSG "RTLgen: unbound variable " :: Errors.CTX name :: nil) | Some r => ret r end. @@ -598,7 +598,7 @@ Fixpoint transl_stmt (map: mapping) (s: stmt) (nd: node) error (Errors.msg "RTLgen: wrong switch") | Sreturn opt_a => match opt_a, rret with - | None, None => ret nret + | None, _ => ret nret | Some a, Some r => transl_expr map a r nret | _, _ => error (Errors.msg "RTLgen: type mismatch on return") end |