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| author | xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e> | 2013-03-01 15:32:13 +0000 |
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| committer | xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e> | 2013-03-01 15:32:13 +0000 |
| commit | 5020a5a07da3fd690f5d171a48d0c73ef48f9430 (patch) | |
| tree | 3ddd75a3ef65543de814f2e0881f8467df73e089 /ia32/Asmgen.v | |
| parent | f401437a97b09726d029e3a1b65143f34baaea70 (diff) | |
| download | compcert-5020a5a07da3fd690f5d171a48d0c73ef48f9430.tar.gz compcert-5020a5a07da3fd690f5d171a48d0c73ef48f9430.zip | |
Revised Stacking and Asmgen passes and Mach semantics:
- no more prediction of return addresses (Asmgenretaddr is gone)
- instead, punch a hole for the retaddr in Mach stack frame and
fill this hole with the return address in the Asmgen proof.
git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2129 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
Diffstat (limited to 'ia32/Asmgen.v')
| -rw-r--r-- | ia32/Asmgen.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/ia32/Asmgen.v b/ia32/Asmgen.v index 6b7cbf9b..a7a629b6 100644 --- a/ia32/Asmgen.v +++ b/ia32/Asmgen.v @@ -549,7 +549,7 @@ Fixpoint transl_code (f: Mach.function) (il: list Mach.instruction) (edx_is_par around, leading to incorrect executions. *) Definition transf_function (f: Mach.function) : res Asm.code := - do c <- transl_code f f.(fn_code) true; + do c <- transl_code f f.(Mach.fn_code) true; if zlt (list_length_z c) Int.max_unsigned then OK (Pallocframe f.(fn_stacksize) f.(fn_retaddr_ofs) f.(fn_link_ofs) :: c) else Error (msg "code size exceeded"). |