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| author | Xavier Leroy <xavier.leroy@inria.fr> | 2016-10-02 16:17:51 +0200 |
|---|---|---|
| committer | Xavier Leroy <xavier.leroy@inria.fr> | 2016-10-02 16:17:51 +0200 |
| commit | f21a6b181dded86ef0e5c7ab94f74e5b960fd510 (patch) | |
| tree | 01bb7b59e438c60d12d87d869b6c890095a977f4 /ia32/ConstpropOpproof.v | |
| parent | a14b9578ee5297d954103e05d7b2d322816ddd8f (diff) | |
| download | compcert-f21a6b181dded86ef0e5c7ab94f74e5b960fd510.tar.gz compcert-f21a6b181dded86ef0e5c7ab94f74e5b960fd510.zip | |
Improve code generation for 64-bit signed integer division
Implement the 'shift right extended' trick, both in the generic implementation (backend/SplitLong) and in the IA32 port.
Note that now SelectDiv depends on SelectLong, and that some work was moved from SelectLong to SelectDiv.
Diffstat (limited to 'ia32/ConstpropOpproof.v')
| -rw-r--r-- | ia32/ConstpropOpproof.v | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/ia32/ConstpropOpproof.v b/ia32/ConstpropOpproof.v index 4175d2f9..161b9579 100644 --- a/ia32/ConstpropOpproof.v +++ b/ia32/ConstpropOpproof.v @@ -578,6 +578,20 @@ Proof. econstructor; split; eauto. auto. Qed. +Lemma make_divlimm_correct: + forall n r1 r2 v, + Val.divls e#r1 e#r2 = Some v -> + e#r2 = Vlong n -> + let (op, args) := make_divlimm n r1 r2 in + exists w, eval_operation ge (Vptr sp Ptrofs.zero) op e##args m = Some w /\ Val.lessdef v w. +Proof. + intros; unfold make_divlimm. + destruct (Int64.is_power2' n) eqn:?. destruct (Int.ltu i (Int.repr 63)) eqn:?. + rewrite H0 in H. econstructor; split. simpl; eauto. eapply Val.divls_pow2; eauto. auto. + exists v; auto. + exists v; auto. +Qed. + Lemma make_divluimm_correct: forall n r1 r2 v, Val.divlu e#r1 e#r2 = Some v -> @@ -821,6 +835,9 @@ Proof. (* mull *) rewrite Val.mull_commut in H0. InvApproxRegs; SimplVM; inv H0. apply make_mullimm_correct; auto. InvApproxRegs; SimplVM; inv H0. apply make_mullimm_correct; auto. +(* divl *) + assert (e#r2 = Vlong n2). clear H0. InvApproxRegs; SimplVM; auto. + apply make_divlimm_correct; auto. (* divlu *) assert (e#r2 = Vlong n2). clear H0. InvApproxRegs; SimplVM; auto. apply make_divluimm_correct; auto. |