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author | Michael Schmidt <github@mschmidt.me> | 2018-04-19 12:57:53 +0200 |
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committer | Bernhard Schommer <bernhardschommer@gmail.com> | 2018-04-27 14:28:14 +0200 |
commit | 5344a75a6a8d09006dbf227cc9717aafd239da20 (patch) | |
tree | d93f6fc3ea006d42de2ef8cfbd61fe34bd0c0680 /powerpc/CBuiltins.ml | |
parent | 2aa105b546748cc0dd2fa65d4e9b948395a412eb (diff) | |
download | compcert-5344a75a6a8d09006dbf227cc9717aafd239da20.tar.gz compcert-5344a75a6a8d09006dbf227cc9717aafd239da20.zip |
Add new powerpc builtins.
New builtin for 64-bit load/store with byte reversal and 64-bit
mul-high.
Bug 23541
Diffstat (limited to 'powerpc/CBuiltins.ml')
-rw-r--r-- | powerpc/CBuiltins.ml | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/powerpc/CBuiltins.ml b/powerpc/CBuiltins.ml index 35d6b89f..c76b69ba 100644 --- a/powerpc/CBuiltins.ml +++ b/powerpc/CBuiltins.ml @@ -42,6 +42,11 @@ let builtins = { (TInt(IInt, []), [TInt(IULongLong, [])], false); "__builtin_cmpb", (TInt (IUInt, []), [TInt(IUInt, []);TInt(IUInt, [])], false); + (* Integer arithmetic in 32/64-bit hybrid mode *) + "__builtin_mulhd", + (TInt(ILongLong, []), [TInt(ILongLong, []); TInt(ILongLong, [])], false); + "__builtin_mulhdu", + (TInt(IULongLong, []), [TInt(IULongLong, []); TInt(IULongLong, [])], false); (* Float arithmetic *) "__builtin_fmadd", (TFloat(FDouble, []), @@ -80,6 +85,11 @@ let builtins = { (TVoid [], [TPtr(TInt(IUShort, []), []); TInt(IUShort, [])], false); "__builtin_write32_reversed", (TVoid [], [TPtr(TInt(IUInt, []), []); TInt(IUInt, [])], false); + (* Memory accesses in 32/64-bit hybrid mode *) + "__builtin_read64_reversed", + (TInt(IULongLong, []), [TPtr(TInt(IULongLong, [AConst]), [])], false); + "__builtin_write64_reversed", + (TVoid [], [TPtr(TInt(IULongLong, []), []); TInt(IULongLong, [])], false); (* Synchronization *) "__builtin_eieio", (TVoid [], [], false); @@ -113,7 +123,7 @@ let builtins = { (TInt(IUInt, []), [TInt(IInt, [])], false); "__builtin_set_spr", (TVoid [], [TInt(IInt, []); TInt(IUInt, [])], false); - (* Access to special registers in 32bit hybrid mode*) + (* Access to special registers in 32/64-bit hybrid mode *) "__builtin_get_spr64", (TInt(IULongLong, []), [TInt(IInt, [])], false); "__builtin_set_spr64", @@ -135,7 +145,7 @@ let builtins = { (* no operation *) "__builtin_nop", (TVoid [], [], false); - (* atomic operations *) + (* Atomic operations *) "__builtin_atomic_exchange", (TVoid [], [TPtr (TInt(IInt, []),[]);TPtr (TInt(IInt, []),[]);TPtr (TInt(IInt, []),[])],false); "__builtin_atomic_load", |