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author | Xavier Leroy <xavier.leroy@inria.fr> | 2019-08-08 11:18:38 +0200 |
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committer | Xavier Leroy <xavier.leroy@college-de-france.fr> | 2019-08-08 11:18:38 +0200 |
commit | 7cdd676d002e33015b496f609538a9e86d77c543 (patch) | |
tree | f4d105bce152445334613e857d4a672976a56f3e /riscV/Asmgenproof1.v | |
parent | eb85803875c5a4e90be60d870f01fac380ca18b0 (diff) | |
download | compcert-7cdd676d002e33015b496f609538a9e86d77c543.tar.gz compcert-7cdd676d002e33015b496f609538a9e86d77c543.zip |
AArch64 port
This commit adds a back-end for the AArch64 architecture, namely ARMv8
in 64-bit mode.
Diffstat (limited to 'riscV/Asmgenproof1.v')
-rw-r--r-- | riscV/Asmgenproof1.v | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/riscV/Asmgenproof1.v b/riscV/Asmgenproof1.v index 98d5bd33..b4d6b831 100644 --- a/riscV/Asmgenproof1.v +++ b/riscV/Asmgenproof1.v @@ -400,22 +400,6 @@ Ltac ArgsInv := | [ H: freg_of _ = OK _ |- _ ] => simpl in *; rewrite (freg_of_eq _ _ H) in * end). -Inductive exec_straight_opt: code -> regset -> mem -> code -> regset -> mem -> Prop := - | exec_straight_opt_refl: forall c rs m, - exec_straight_opt c rs m c rs m - | exec_straight_opt_intro: forall c1 rs1 m1 c2 rs2 m2, - exec_straight ge fn c1 rs1 m1 c2 rs2 m2 -> - exec_straight_opt c1 rs1 m1 c2 rs2 m2. - -Remark exec_straight_opt_right: - forall c3 rs3 m3 c1 rs1 m1 c2 rs2 m2, - exec_straight_opt c1 rs1 m1 c2 rs2 m2 -> - exec_straight ge fn c2 rs2 m2 c3 rs3 m3 -> - exec_straight ge fn c1 rs1 m1 c3 rs3 m3. -Proof. - destruct 1; intros. auto. eapply exec_straight_trans; eauto. -Qed. - Lemma transl_cbranch_correct_1: forall cond args lbl k c m ms b sp rs m', transl_cbranch cond args lbl k = OK c -> |