diff options
| author | Xavier Leroy <xavierleroy@users.noreply.github.com> | 2016-08-24 11:24:59 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2016-08-24 11:24:59 +0200 |
| commit | 0a7288fb65ebaed329e06c1fd14aef83e8defcda (patch) | |
| tree | c2c7ac666c62be0f97a20c74286e0457890ddd8d /runtime/arm/sysdeps.h | |
| parent | 954b01e1ac6189f4a8b5ad1b6accf6eb01261d1f (diff) | |
| parent | e0f0f573a4a8fc1f564a31388afa9c23e48bb016 (diff) | |
| download | compcert-0a7288fb65ebaed329e06c1fd14aef83e8defcda.tar.gz compcert-0a7288fb65ebaed329e06c1fd14aef83e8defcda.zip | |
Merge pull request #118 from AbsInt/armeb
Support for ARM Big Endian
Diffstat (limited to 'runtime/arm/sysdeps.h')
| -rw-r--r-- | runtime/arm/sysdeps.h | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/runtime/arm/sysdeps.h b/runtime/arm/sysdeps.h index 3d6a702c..fd4ea61d 100644 --- a/runtime/arm/sysdeps.h +++ b/runtime/arm/sysdeps.h @@ -95,3 +95,43 @@ f: .arch armv7 #endif .fpu vfpv2 + + + +// Endianness dependencies + +// Location of high and low word of first register pair (r0:r1) +#ifdef ENDIANNESS_big +#define Reg0HI r0 +#define Reg0LO r1 +#else +#define Reg0HI r1 +#define Reg0LO r0 +#endif + +// Location of high and low word of second register pair (r2:r3) +#ifdef ENDIANNESS_big +#define Reg1HI r2 +#define Reg1LO r3 +#else +#define Reg1HI r3 +#define Reg1LO r2 +#endif + +// Location of high and low word of third register pair (r4:r5) +#ifdef ENDIANNESS_big +#define Reg2HI r4 +#define Reg2LO r5 +#else +#define Reg2HI r5 +#define Reg2LO r4 +#endif + +// Location of high and low word of fourth register pair (r6:r7) +#ifdef ENDIANNESS_big +#define Reg3HI r6 +#define Reg3LO r7 +#else +#define Reg3HI r7 +#define Reg3LO r6 +#endif |