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* Long-overdue renaming: val_inject -> Val.inject, etc, for consistency with ↵Xavier Leroy2015-04-301-47/+47
| | | | Val.lessdef, etc.
* Allow "scratch" (non-allocatable temporary registers) to be mentioned in asm ↵Xavier Leroy2015-04-232-1/+4
| | | | clobber lists.
* Take asm clobbers into account for determining callee-save registers used.Xavier Leroy2015-04-232-0/+8
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* Cleanups and updates for extended asm.Xavier Leroy2015-04-211-1/+1
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* Support for GCC-style extended asm, continued:Xavier Leroy2015-04-211-1/+1
| | | | | | | | - support "r", "m" and "i" constraints - support "%Q" and "%R" modifiers for register pairs - support register clobbers - split off analysis and transformation of asm statements in cparser/ExtendedAsm.ml
* Experiment: support a subset of GCC's extended asm statements.Xavier Leroy2015-04-172-2/+6
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* Correct type of label function.Bernhard Schommer2015-04-161-1/+1
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* Added missing dummy functions.Bernhard Schommer2015-04-161-0/+4
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* Merge branch 'master' into dwarfBernhard Schommer2015-04-042-3/+5
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| * Fixed missing unsigned compare for pointer in the arm backend.Bernhard Schommer2015-04-042-3/+5
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* | Merge branch 'master' into dwarfBernhard Schommer2015-04-025-46/+41
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| * Updating the PowerPC and ARM ports.Xavier Leroy2015-03-275-46/+41
| | | | | | | | PowerPC: always use full register names to print annotations.
* | Merge branch 'master' into dwarfBernhard Schommer2015-03-231-2/+6
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| * Fix .type and .size annotations: @ is comment, use % instead.Xavier Leroy2015-03-201-2/+6
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* | Merge branch 'master' into dwarfBernhard Schommer2015-03-161-0/+1
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| * Missing initialization of current_function_sig.Xavier Leroy2015-03-141-0/+1
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* | Started implementing the printing functions for the debug info. Added a ↵Bernhard Schommer2015-03-161-0/+6
| | | | | | | | global target dependend option to activate the printing only for targets wher it works.
* | Started integrating the debug printing in the common backend_printer.Bernhard Schommer2015-03-111-0/+6
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* Removed unused sel_target, changed cygwin symbol names and changed the ↵Bernhard Schommer2015-02-191-1/+2
| | | | default function aligment to be target dependent.
* Added an elf prefix to all common elf functions in PrintAsmaux.Bernhard Schommer2015-02-181-3/+5
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* Changed print_fun/var_info to be functions instead of booleans.Bernhard Schommer2015-02-181-2/+2
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* Removed some style issues.Bernhard Schommer2015-02-181-2/+2
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* Changed arm backend to the common backend printer.Bernhard Schommer2015-02-093-1189/+1140
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* Moved more common functions into a seperate file.Bernhard Schommer2015-02-041-45/+8
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* Started moving common backend functions into one file.Bernhard Schommer2015-02-031-44/+21
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* In -g -S mode, annotate the generated asm file with the C source code in ↵Xavier Leroy2015-01-071-25/+10
| | | | | | comments. Refactor printing of .loc debug directives in backend/PrintAnnot.ml
* Clean up support for common symbols. Uninitialized "const" symbols can be ↵Xavier Leroy2014-12-171-2/+4
| | | | common.
* Update the ARM port.Xavier Leroy2014-11-242-50/+38
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* Verification of the Unusedglob pass (removal of unreferenced static global ↵Xavier Leroy2014-11-241-32/+0
| | | | definitions). Assorted changes to ia32/Op.v. PowerPC and ARM need updating.
* Refactored the code of arm/PrintAsm.ml in order to allow the parametrization ↵Bernhard Schommer2014-10-061-44/+86
| | | | of the printing code over the configuration-dependent bits.
* Cold feet: suppress builtins for load with reservation/store conditional, ↵xleroy2014-08-282-34/+1
| | | | | | use case is unclear. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2622 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Rename __builtin_cntlz to __builtin_clz.xleroy2014-08-272-2/+2
| | | | | | | IA32: add __builtin_clz, __builtin_ctz. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2619 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Use VFD regs to implement 64-bit mem-mem copies in builtin_memcpy_false.xleroy2014-08-213-5/+10
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2616 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Wrong types for strex builtins.xleroy2014-08-201-4/+4
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2612 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Obvious typos in commit r2609xleroy2014-08-201-8/+8
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2610 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Add some more synchronization builtinsxleroy2014-08-202-1/+39
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2609 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Rename "-fthumb" option into "-mthumb" for GCC compatibility.xleroy2014-08-191-8/+8
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2572 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* configure: distinguish between ABI and processor model.xleroy2014-07-292-11/+30
| | | | | | | | ARM: various tweaks, incl. support for SDIV and UDIV insns when available. test/regression/funptr2.c: Thumb does weird things with <function ptr>+1. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2555 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* All targets: add __builtin_membarxleroy2014-07-282-22/+36
| | | | | | | ARM: add __builtin_dsb __builtin_isb git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2554 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* PowerPC port: refactored the expansion of built-in functions andxleroy2014-07-281-0/+18
| | | | | | | | | | pseudo-instructions so that it does not need to be re-done in cchecklink. cchecklink: updated accordingly. testsuite: compile with -sdump and run cchecklink if supported. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2553 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* The NaN behavior of float_of_single differs on PowerPC and on IA32/ARM.xleroy2014-07-281-1/+4
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2550 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* ARM port: add support for Thumb2. To be tested.xleroy2014-07-277-503/+837
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2549 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Merge the various $(ARCH)/$(VARIANT)/xxx.v files into $(ARCH)/xxx.v.xleroy2014-07-236-718/+125
| | | | | | | | | The only platform where we have two variants is ARM, and it's easier to share the callling convention code between the two than to maintain both variants separately. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2540 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Merge of "newspilling" branch:xleroy2014-07-2316-236/+864
| | | | | | | | | | | | | | | - Support single-precision floats as first-class values - Introduce chunks Many32, Many64 and types Tany32, Tany64 to support saving and restoring registers without knowing the exact types (int/single/float) of their contents, just their sizes. - Memory model: generalize the opaque encoding of pointers to apply to any value, not just pointers, if chunks Many32/Many64 are selected. - More properties of FP arithmetic proved. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2537 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Instead of having two expansions of shrximm (one in SelectOp, one in ↵xleroy2014-05-284-78/+54
| | | | | | Asmgen), move the most efficient expansion to Asmgen. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2504 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Refactoring: move symbol_offset into Genv.xleroy2014-05-246-32/+20
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2503 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* ARM: honor common variables.xleroy2014-05-021-11/+24
| | | | | | | Changelog: update. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2475 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Preliminary support for EABI-hardfloat calling conventionsxleroy2014-05-023-48/+938
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2473 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Constprop: use "not" for "xorimm(-1)"; optimize == 1 and != 0 comparisons ↵xleroy2014-04-094-25/+137
| | | | | | | | | | over booleans. Select*: more systematic constant propagation; don't CP shifts by amounts outside of [0..31]. Driver: timer for whole compilation. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2452 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Force dependency of SelectOp on Compopts.xleroy2014-03-031-0/+1
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2428 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e