aboutsummaryrefslogtreecommitdiffstats
path: root/powerpc/Asmexpand.ml
Commit message (Collapse)AuthorAgeFilesLines
...
| * | Merge branch 'asmexpand' of github.com:AbsInt/CompCertBernhard Schommer2015-06-261-44/+11
| | |
| * | Revert "Merge branch 'asmexpand' of github.com:AbsInt/CompCert"Bernhard Schommer2015-06-261-11/+44
| | | | | | | | | | | | | | | This reverts commit 777566e81b9762d6bdc773a1f63d56a7ac97433c, reversing changes made to daf9ac64fc9611ecf09d70560a6fa1ba80b9c9c1.
| * | Merge branch 'asmexpand' of github.com:AbsInt/CompCertBernhard Schommer2015-06-261-44/+11
| |\ \
| | * | Moved the printing of the builtin functions etc. into Asmexpand for ARM in ↵Bernhard Schommer2015-06-101-44/+11
| | | | | | | | | | | | | | | | the same way as it is done for PPC.
* | | | Added builtin for the dcbi instruction.Bernhard Schommer2015-08-171-0/+2
| | | |
* | | | Added builitin for the icbi instruction.Bernhard Schommer2015-08-141-0/+2
| | | |
* | | | Added builtin for the lwsync barrier.Bernhard Schommer2015-08-141-0/+2
| |_|/ |/| |
* | | Set/clear CR6 before calling an unprototyped function.Xavier Leroy2015-07-071-3/+4
| | | | | | | | | | | | | | | | | | A function declared without a prototype could be implemented by a vararg function (even though this is undefined behavior in C99). Be nice in this case.
* | | Corrected little typo in __builtin_clz function.Bernhard Schommer2015-07-061-1/+1
|/ /
* / Changed a minor typo: Pstwxu should be PstwuxBernhard Schommer2015-06-221-1/+1
|/
* Support for GCC-style extended asm, continued:Xavier Leroy2015-04-211-1/+1
| | | | | | | | - support "r", "m" and "i" constraints - support "%Q" and "%R" modifiers for register pairs - support register clobbers - split off analysis and transformation of asm statements in cparser/ExtendedAsm.ml
* Experiment: support a subset of GCC's extended asm statements.Xavier Leroy2015-04-171-1/+1
|
* Updating the PowerPC and ARM ports.Xavier Leroy2015-03-271-1/+1
| | | | PowerPC: always use full register names to print annotations.
* Cold feet: suppress builtins for load with reservation/store conditional, ↵xleroy2014-08-281-6/+0
| | | | | | use case is unclear. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2622 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Rename __builtin_cntlz to __builtin_clz.xleroy2014-08-271-1/+1
| | | | | | | IA32: add __builtin_clz, __builtin_ctz. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2619 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Add builtins for load with reservation and conditional store.xleroy2014-08-201-0/+6
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2613 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* powerpc/Asm: simplify the modeling of Csymbol_low and Csymbol_high.xleroy2014-08-181-6/+26
| | | | | | | | | | | powerpc/Asmgen*: simplify the code generated for far-data relative accesses, so that the only occurrences of Csymbol_rel_{low,high} are in the pattern Paddis(r, GPR0, Csymbol_rel_high...); Paddi(r, r, Csymbol_rel_low...) checklink/Check.ml: check the pattern above. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2569 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* All targets: add __builtin_membarxleroy2014-07-281-7/+9
| | | | | | | ARM: add __builtin_dsb __builtin_isb git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2554 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* PowerPC port: refactored the expansion of built-in functions andxleroy2014-07-281-0/+525
pseudo-instructions so that it does not need to be re-done in cchecklink. cchecklink: updated accordingly. testsuite: compile with -sdump and run cchecklink if supported. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2553 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
generated by cgit (git 2.34.1) at 2024-07-03 07:43:33 +0000