| Commit message (Collapse) | Author | Age | Files | Lines |
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Since Coq 8.12, `omega` is flagged as deprecated and scheduled for removal.
Also replace CompCert's homemade tactics `omegaContradiction`, `xomega`,
and `xomegaContradiction` with `lia` and `extlia`.
Turn back on the deprecation warning for uses of `omega`.
Make the proof of `Ctypes.sizeof_pos` more robust to variations in `lia`.
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Also remove the Ofloatofint, Ofloatofintu, and Ointuoffloat
PowerPC operations.
The pseudoinstructions were used to implement these operations,
as follows:
Pfcfi : Ofloatofint i.e. the conversion signed int32 -> float64
Pfcfiu : Ofloatofintu i.e. the conversion unsigned int32 -> float64
Pfctiu : Ointuoffloat i.e. the conversion float64 -> unsigned int32
These pseudoinstructions were expanded (in Asmexpand.ml) in terms of
Pfcfid : signed int64 -> float64
Pfctidz : float64 -> signed int64
and int32/int64 conversions.
This commit performs this expansion during instruction selection
(SelectOp.vp):
floatofint(n) becomes floatoflong(longofint(n))
floatofintu(n) becomes floatoflong(longuofint(n))
intuoffloat(n) becomes cast32unsigned(longoffloat(n))
Then there is no need for the 3 removed operations and the 3 removed
pseudoinstructions.
More importantly, the correctness of these expansions is now proved as
part of instruction selection, using the corresponding results from
Floats.v.
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This operation compiles down to an `isel` instruction (conditional move).
The semantics is given by `Val.select`.
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This commit adds code generation for 64bit PowerPC architectures which execute
32bit applications.
The main difference to the normal 32bit PowerPC port is that it uses the
available 64bit instructions instead of using the runtime library functions.
However pointers are still 32bit and the 32bit calling convention is used.
In order to use this port the target architecture must be either in Server
execution mode or if in Embedded execution mode the high order 32 bits of GPRs
must be implemented in 32-bit mode. Furthermore the operating system must
preserve the high order 32 bits of GPRs.
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The PowerPC port remains 32-bit only, no support is added for PPC 64.
This shows how much work is needed to update an existing port a minima.
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Also: implement __builtin_isel on non-EREF platforms with a branch-free instruction sequence.
Also: extend ./configure so that it recognizes "ppc64-" and "e5500-" platforms in addition to "ppc-".
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- Support single-precision floats as first-class values
- Introduce chunks Many32, Many64 and types Tany32, Tany64 to
support saving and restoring registers without knowing
the exact types (int/single/float) of their contents, just
their sizes.
- Memory model: generalize the opaque encoding of pointers to
apply to any value, not just pointers, if chunks Many32/Many64
are selected.
- More properties of FP arithmetic proved.
git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2537 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
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git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2401 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
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git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2381 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
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