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* Merge branch 'master' into dwarfBernhard Schommer2015-01-124-38/+12
|\ | | | | | | | | Conflicts: powerpc/PrintAsm.ml
| * In -g -S mode, annotate the generated asm file with the C source code in ↵Xavier Leroy2015-01-071-39/+18
| | | | | | | | | | | | comments. Refactor printing of .loc debug directives in backend/PrintAnnot.ml
* | Added dummy printing function for entries.Bernhard Schommer2014-12-181-1/+4
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* | Merge branch 'master' into dwarfBernhard Schommer2014-12-172-10/+11
|\| | | | | | | | | Conflicts: powerpc/PrintAsm.ml
| * Clean up support for common symbols. Uninitialized "const" symbols can be ↵Xavier Leroy2014-12-171-9/+10
| | | | | | | | common.
* | Added more printing code.Bernhard Schommer2014-12-151-3/+8
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* | Started implementation of printing the dwarf entries.Bernhard Schommer2014-12-151-0/+16
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* | Changed the d1line and d1file to d2line and d2file and prologue and epilogue ↵Bernhard Schommer2014-12-044-8/+78
| | | | | | | | printing for printing the line directives without forcing the assembler to generate debug information.
* | Renamed the printer module for the Abbreviations and deactivated adding the ↵Bernhard Schommer2014-12-021-29/+5
| | | | | | | | -g option to the assembler.
* | Merge branch 'master' into dwarfBernhard Schommer2014-11-273-88/+51
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| * Update PowerPC port.Xavier Leroy2014-11-242-21/+51
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| * Verification of the Unusedglob pass (removal of unreferenced static global ↵Xavier Leroy2014-11-241-67/+0
| | | | | | | | definitions). Assorted changes to ia32/Op.v. PowerPC and ARM need updating.
* | Removed compile error and added dummy function for the printing of entries.Bernhard Schommer2014-11-171-0/+3
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* | Moved abbreviation printer into a seperate file. The printer should also ↵Bernhard Schommer2014-11-121-31/+48
| | | | | | | | print the debug info.
* | Added functions for printing of the abbreviations.Bernhard Schommer2014-11-111-0/+24
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* | Generalised functionality for the printing of the abbreviations.Bernhard Schommer2014-11-111-235/+41
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* | Added more functions to print the abbreviations.Bernhard Schommer2014-11-061-27/+120
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* | More functions for printing the abbreviations.Bernhard Schommer2014-10-311-33/+101
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* | Started implementing functions to compute the abbreviations for the diab ↵Bernhard Schommer2014-10-291-7/+81
| | | | | | | | compiler.
* | Refactored the printing functions a little bit more by moving the system ↵Bernhard Schommer2014-10-284-328/+397
|/ | | | dependent parts into other modules and some of the functions into a util file.
* Refactored the code of powerpc/PrintAsm.ml by moving the function depending ↵Bernhard Schommer2014-10-081-200/+236
| | | | on the target system in a seperate module.
* Cold feet: suppress builtins for load with reservation/store conditional, ↵xleroy2014-08-282-11/+1
| | | | | | use case is unclear. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2622 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Rename __builtin_cntlz to __builtin_clz.xleroy2014-08-272-2/+2
| | | | | | | IA32: add __builtin_clz, __builtin_ctz. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2619 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Add builtins for load with reservation and conditional store.xleroy2014-08-204-1/+19
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2613 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* checklink/Check.ml: missing SDA addressing for store instructions.xleroy2014-08-191-12/+20
| | | | | | | | powerpc/PrintAsm.ml: update Linux output (Csymbol_rel, SDA sections). test/regression/sections.c: test for SDA and relative addressings. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2571 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* powerpc/Asm: simplify the modeling of Csymbol_low and Csymbol_high.xleroy2014-08-186-118/+117
| | | | | | | | | | | powerpc/Asmgen*: simplify the code generated for far-data relative accesses, so that the only occurrences of Csymbol_rel_{low,high} are in the pattern Paddis(r, GPR0, Csymbol_rel_high...); Paddi(r, r, Csymbol_rel_low...) checklink/Check.ml: check the pattern above. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2569 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* All targets: add __builtin_membarxleroy2014-07-281-7/+9
| | | | | | | ARM: add __builtin_dsb __builtin_isb git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2554 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* PowerPC port: refactored the expansion of built-in functions andxleroy2014-07-285-507/+711
| | | | | | | | | | pseudo-instructions so that it does not need to be re-done in cchecklink. cchecklink: updated accordingly. testsuite: compile with -sdump and run cchecklink if supported. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2553 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* The NaN behavior of float_of_single differs on PowerPC and on IA32/ARM.xleroy2014-07-281-1/+4
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2550 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Merge the various $(ARCH)/$(VARIANT)/xxx.v files into $(ARCH)/xxx.v.xleroy2014-07-232-0/+6
| | | | | | | | | The only platform where we have two variants is ARM, and it's easier to share the callling convention code between the two than to maintain both variants separately. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2540 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Merge of "newspilling" branch:xleroy2014-07-2316-311/+550
| | | | | | | | | | | | | | | - Support single-precision floats as first-class values - Introduce chunks Many32, Many64 and types Tany32, Tany64 to support saving and restoring registers without knowing the exact types (int/single/float) of their contents, just their sizes. - Memory model: generalize the opaque encoding of pointers to apply to any value, not just pointers, if chunks Many32/Many64 are selected. - More properties of FP arithmetic proved. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2537 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Refactoring: move symbol_offset into Genv.xleroy2014-05-247-100/+61
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2503 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Updated the proofs.xleroy2014-04-121-1/+3
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2454 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Constprop: use "not" for "xorimm(-1)"; optimize == 1 and != 0 comparisons ↵xleroy2014-04-094-28/+153
| | | | | | | | | | over booleans. Select*: more systematic constant propagation; don't CP shifts by amounts outside of [0..31]. Driver: timer for whole compilation. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2452 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* In Regalloc, dead code elimination, don't eliminate move operationsxleroy2014-02-231-0/+2
| | | | | | | | that pop the x87 FP stack (var <- FP0). Otherwise, (void) f(); where f returns a float eventually produces a FP stack overflow. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2416 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* PowerPC is big-endian, dammit.xleroy2014-02-211-2/+2
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2412 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Add option -Os to optimize for code size rather than for execution speed.xleroy2014-02-195-4/+13
| | | | | | | | Refactored compilation flags that affect the Coq part (module Compopts). Added support for C99 for loops with declarations. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2410 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Recognize .i and .p source files as C sources not to be preprocessed.xleroy2014-02-051-0/+1
| | | | | | | Add CompCert version number and command line as comments in generated asm. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2407 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Eradication of Mfloat64al32, continued.xleroy2014-01-121-4/+0
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2404 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* - Back to origins: suppress Mfloat64al32 chunk and align Mfloat64 to 4.xleroy2014-01-123-8/+8
| | | | | | | - Revised printing of intermediate RTL code. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2403 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Introduce and use the platform-specific Archi module giving:xleroy2014-01-031-5/+13
| | | | | | | | | | - endianness - alignment constraints for 8-byte types (which is 4 for x86 ABI and 8 for other ABIs) - NaN handling options (superceding the Nan module, removed). git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2402 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Update for the multiple-input-needs case.xleroy2014-01-031-40/+45
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2401 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Updated ARM backend wrt new static analyses and optimizations.xleroy2014-01-021-0/+12
| | | | | | | | NeedOp, Deadcode: must have distinct needs per argument of an operator. This change remains to be propagated to IA32 and PPC. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2399 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* stdarg.h: assorted fixes for PowerPCxleroy2014-01-011-2/+3
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2397 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* powerpc: bad use of GPR0 in va_start.xleroy2014-01-011-6/+9
| | | | | | | arm: typo. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2396 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Fine hair splitting depending on whether va_list is a scalar type (IA32, ↵xleroy2014-01-011-0/+1
| | | | | | ARM) or an array type (PowerPC). git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2395 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Experimental support for <stdarg.h>, the GCC way. Works on IA32. To be ↵xleroy2014-01-012-2/+62
| | | | | | tested on PowerPC and ARM. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2394 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Simpler, more robust emulation of calls to variadic functions:xleroy2013-12-281-45/+15
| | | | | | | | | | | | | | - C function types and Cminor signatures annotated by calling conventions. esp. vararg / not vararg - Cshmgen: generate correct code for function call where there are more arguments than listed in the function prototype. This is still undefined behavior according to the formal semantics, but correct code is generated. - C2C, */PrintAsm.ml: remove "printf$iif" hack. - powerpc/, checklink/: don't generate stubs for variadic functions. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2386 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Future-proofing: keep signature information in IA32 and PowerPC Asm, just ↵xleroy2013-12-266-68/+69
| | | | | | like we already do in ARM Asm. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2385 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Merge of branch value-analysis.xleroy2013-12-207-431/+595
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2381 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
generated by cgit (git 2.34.1) at 2024-06-29 01:20:36 +0000