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* Optimization for division by one during constant propagation (#39)Michael Schmidt2017-12-052-6/+13
| | | | Signed and unsigned divisions by literal 1 are already optimized away during the Selection phase. This pull request also optimizes those divisions when the 1 divisor is produced by constant propagation.
* New json printing interface.Bernhard Schommer2017-11-141-143/+18
| | | | | The common json export functionallity is moved into an own File. Bug 22472
* Remove no longer used function. Bug 22525Bernhard Schommer2017-11-101-2/+0
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* Removed no longer used function. Bug 22525Bernhard Schommer2017-11-091-30/+0
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* Fix jumptable issue.Bernhard Schommer2017-11-081-1/+1
| | | | | | Instead of using reset_constants use reset_literals which avoids emptying the jumptables. Bug 22525
* Simplifiy handling of constant emmitting.Bernhard Schommer2017-11-081-20/+14
| | | | | | Instead of just storing the constants in a list, they are now stored in a hashtable. This avoids printing of duplicates. Bug 22525
* Remove superfluous function.Bernhard Schommer2017-11-061-2/+0
| | | | | The new_label function is alway equal to PrintAsmaux.new_label. Bug 22472
* Merge pull request #191 from sigurdschneider/masterXavier Leroy2017-10-201-0/+1
|\ | | | | | | Ensure FunInd or Recdef is imported if functional induction is used. This is necessary for Coq 8.7.0.
| * Ensure FunInd or Recdef is imported if functional induction is usedSigurd Schneider2017-07-201-0/+1
| | | | | | | | | | | | Coq 8.7 does not load FunInd in prelude anymore, so this is necessary. Recdef exports FunInd, so if Recdef is imported, importing FunInd is not required.
* | New support for inserting ais-annotations.Bernhard Schommer2017-10-194-13/+29
| | | | | | | | | | | | | | | | | | | | | | | | The ais annotations can be inserted via the new ais variants of the builtin annotation. They mainly differe in that they have an address format specifier '%addr' which will be replaced by the adress in the binary. The implementation simply prints a label for the builtin call alongside a the text of the annotation as comment and inserts the annotation together as acii string in a separate section 'ais_annotations' and replaces the usages of the address format specifiers by the address of the label of the builtin call.
* | Make the list unique. Bug 22239Bernhard Schommer2017-09-261-177/+22
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* | Moved common buitlins to C2C gernic_builtins.Bernhard Schommer2017-09-261-8/+0
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* | Added dump-mnemonics option.Bernhard Schommer2017-09-252-0/+186
| | | | | | | | | | | | This option allows it to dump a list of all used mnemonics into a file. Bug 22239
* | Remove coq warnings (#28)Bernhard Schommer2017-09-225-23/+23
| | | | | | | | Replace deprecated functions and theorems from the Coq standard library (version 8.6) by their non-deprecated counterparts.
* | Disallow usage of default pattern for AsmToJSON.Bernhard Schommer2017-09-221-2/+11
| | | | | | | | | | | | | | In order to ensure that no new instruction is added without adding it to the Json export we enforce warning 4 for the instruction printer and removed all default pattern matchings. Bug 22239
* | Fixed typo.Bernhard Schommer2017-08-241-1/+1
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* | Added annot to json dump.Bernhard Schommer2017-07-241-3/+20
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* | Print_annot should produce a string.Bernhard Schommer2017-07-191-5/+5
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* Constprop strength reduction (#17)Bernhard Schommer2017-07-123-16/+304
| | | | | | | PowerPC port: add strength reduction for 64-bit operations * Added strength reduction for 64bit compare, subl, addl, mull, andl, orl, xorl, divl, shll, shrl, shrlu, shrluimm, shllimm, mullimm, divlu. (Bug 21748) * Moved shru_rolml proof to Values.
* Extend builtin arguments with a pointer addition operator, continuedXavier Leroy2017-07-065-87/+179
| | | | | | | | - Add support for PowerPC, with all addressing modes. - Add support for ARM, with "reg + ofs" addressing mode. - Add support for RISC-V, with the one addressing mode. - Constprop.v: forgot to recurse in BA_addptr - volatile4 test: more tests
* Issue #16P: wrong rlwinm instruction generated by constant propagationXavier Leroy2017-07-052-11/+26
| | | | This happens when the divisor of an unsigned int32 division is constant-propagated to 1.
* Adopted section names in AsmToJson.Bernhard Schommer2017-06-291-10/+23
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* Formatted json printing.Bernhard Schommer2017-06-282-315/+307
| | | | | | | | | Instead of just dumping the json output it is now a little bit formatted for better reading. Furthermore the AsmToJson function for the non powerpc targets now prints the json value "null" sucht that the resulting json file is valid json.
* Added pseudo instruction for inline asm.Bernhard Schommer2017-06-201-0/+15
| | | | | | The inline assembler instructions are numbered with consecutives id's per compilation unit. Bug 21689
* Print 64bit constants for rldimn and rldimi.Bernhard Schommer2017-05-051-2/+2
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* bug 20956, print correct error message depending on architectureMichael Schmidt2017-05-031-2/+8
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* More asserts.Bernhard Schommer2017-05-031-1/+1
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* Hybrid 64bit/32bit PowerPC portBernhard Schommer2017-05-0322-189/+2378
| | | | | | | | | | | | | This commit adds code generation for 64bit PowerPC architectures which execute 32bit applications. The main difference to the normal 32bit PowerPC port is that it uses the available 64bit instructions instead of using the runtime library functions. However pointers are still 32bit and the 32bit calling convention is used. In order to use this port the target architecture must be either in Server execution mode or if in Embedded execution mode the high order 32 bits of GPRs must be implemented in 32-bit mode. Furthermore the operating system must preserve the high order 32 bits of GPRs.
* RISC-V port and assorted changesXavier Leroy2017-04-282-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commits adds code generation for the RISC-V architecture, both in 32- and 64-bit modes. The generated code was lightly tested using the simulator and cross-binutils from https://riscv.org/software-tools/ This port required the following additional changes: - Integers: More properties about shrx - SelectOp: now provides smart constructors for mulhs and mulhu - SelectDiv, 32-bit integer division and modulus: implement constant propagation, use the new smart constructors mulhs and mulhu. - Runtime library: if no asm implementation is provided, run the reference C implementation through CompCert. Since CompCert rejects the definitions of names of special functions such as __i64_shl, the reference implementation now uses "i64_" names, e.g. "i64_shl", and a renaming "i64_ -> __i64_" is performed over the generated assembly file, before assembling and building the runtime library. - test/: add SIMU make variable to run tests through a simulator - test/regression/alignas.c: make sure _Alignas and _Alignof are not #define'd by C headers commit da14495c01cf4f66a928c2feff5c53f09bde837f Author: Xavier Leroy <xavier.leroy@inria.fr> Date: Thu Apr 13 17:36:10 2017 +0200 RISC-V port, continued Now working on Asmgen. commit 36f36eb3a5abfbb8805960443d087b6a83e86005 Author: Xavier Leroy <xavier.leroy@inria.fr> Date: Wed Apr 12 17:26:39 2017 +0200 RISC-V port, first steps This port is based on Prashanth Mundkur's experimental RV32 port and brings it up to date with CompCert, and adds 64-bit support (RV64). Work in progress.
* Modest optimization of leaf functions (continued)Xavier Leroy2017-04-283-159/+116
| | | | | | - Avoid reloading LR before a tail call if we're in a leaf function - Factor out the code that reloads LR if necessary (function Asmgen.transl_epilogue) - Factor out the corresponding parts of the proof (Asmgenproof1.transl_epilogue_correct, Asmgenproof.step_simulation)
* Modest optimization of leaf functionsXavier Leroy2017-04-283-44/+166
| | | | | | | | | | Leaf functions are functions that do not call any other function. For leaf functions, it is not necessary to save the LR register on function entry nor to reload LR on function return, since LR contains the correct return address throughout the function's execution. This commit suppresses the reloading of LR before returning from a leaf function. LR is still saved on the stack on function entry, because doing otherwise would require extensive changes in the Stacking pass of CompCert. However, preliminary experiments indicate that we get good speedups by avoiding to reload LR, while avoiding to save LR makes little difference in speed. To support this optimization and its proof: - Mach is extended with a `is_leaf_function` Boolean function and a `wf_state` predicate to provide the semantic characterization. - Asmgenproof* is extended with a `important_preg` Boolean function that means "data register or LR". A number of lemmas that used to show preservation of data registers now show preservation of LR as well.
* Assert instead of unit.Bernhard Schommer2017-04-101-6/+6
| | | | | | Instructions expanded by Asmexpand should never end up in AsmToJSON. Bug 21345
* Filter out functions earlier. Bug 21343Bernhard Schommer2017-04-101-24/+27
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* Fix name of function. Bug 21378Bernhard Schommer2017-04-071-1/+1
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* Do not generate code for "inline definitions"Bernhard Schommer2017-04-071-21/+23
| | | | | | | | | ISO C99 states that "inline defintions", functions with inline specifier that are not extern, does not provide an external definition and another compilation unit can contain an external definition. Thus in the case of non-static inline functions no code should be generated. Bug 21343
* Replace 'decide equality' in powerpc/Op.v. Bug 21332Bernhard Schommer2017-04-031-4/+5
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* Give explicit scopes to notations a#b and a##b and a#b<-cXavier Leroy2017-02-131-4/+6
| | | | Without scopes Coq 8.6 warns, probably rightly so.
* Use "Local" as prefixXavier Leroy2017-02-133-4/+4
| | | | | Open Local becomes Local Open. This silences Coq 8.6's warning. Also: remove one useless Require-inside-a-module that caused another warning.
* ARM, PowerPC: update Asmgenproof for Coq 8.6Xavier Leroy2017-02-131-6/+13
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* Remove unused openBernhard Schommer2017-02-061-1/+0
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* Added warning for inline asm in sdump. Bug 20593Bernhard Schommer2016-12-141-1/+6
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* Use 64 bit address in debug information.Bernhard Schommer2016-11-101-0/+7
| | | | | Address constants need to be 64bit also in the debug information. Bug 20335
* Update PowerPC port (not tested yet)Xavier Leroy2016-10-251-2/+0
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* Support for 64-bit architectures: update the PowerPC portXavier Leroy2016-10-0115-296/+478
| | | | | The PowerPC port remains 32-bit only, no support is added for PPC 64. This shows how much work is needed to update an existing port a minima.
* Add interference for indirect calls.Bernhard Schommer2016-09-151-1/+5
| | | | | | Avoids problems with overwritting the registe containing the function address. Bug 19779
* Merge branch 'master' of /common/repositories/git/tools/compcertBernhard Schommer2016-07-092-0/+32
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| * bug 19318, add implementation of __builtin_ctz, __builtin_ctzl and ↵Michael Schmidt2016-07-082-0/+32
| | | | | | | | __builtin_ctzll for PowerPC
* | Port to Coq 8.5pl2Xavier Leroy2016-07-081-3/+2
|/ | | | | Manual merging of branch jhjourdan:coq8.5. No other change un functionality.
* Remove code that will is deprecated in ocaml 4.03Bernhard Schommer2016-06-212-3/+3
| | | | | | | | Most of the code can be String.uppercase usages can either be replaced by a more specialized version of coqstring_of_camlstring (which is also slightly more effecient) or by specialized checks that reject wrong code earlier. Bug 19187
* fix '__builtin_annot_val' to '__builtin_annot_intval', such that CompCert ↵Michael Schmidt2016-06-071-1/+1
| | | | can parse its own .compcert.c output, bug 18060
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