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* Wrong syntax in fcmp.Xavier Leroy2015-09-131-2/+2
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* PowerPC 64 bits: alternate, more efficient implementations of int64 operations.Xavier Leroy2015-09-1212-0/+677
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* Support va_arg for vararg arguments of composite (struct/union) types.Xavier Leroy2015-03-201-0/+7
| | | | Now for IA32 and PowerPC as well.
* stdarg.h: assorted fixes for PowerPCxleroy2014-01-011-5/+5
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2397 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Fine hair splitting depending on whether va_list is a scalar type (IA32, ↵xleroy2014-01-011-3/+3
| | | | | | ARM) or an array type (PowerPC). git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2395 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Experimental support for <stdarg.h>, the GCC way. Works on IA32. To be ↵xleroy2014-01-011-0/+156
| | | | | | tested on PowerPC and ARM. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2394 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* powerpc: faster implementation of long division modeled on that for IA32xleroy2013-07-034-68/+218
| | | | | | | | test: add one test (2^64-1) / (2^32+3) to exercise a special case of this long division. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2288 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Wrong pseudo-instrxleroy2013-05-061-1/+1
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2236 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Support for in64 -> float conversions w/ correct rounding.xleroy2013-05-062-0/+132
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2235 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* ia32/i64_dtou: wrong play on rounding modexleroy2013-05-052-10/+36
| | | | | | | | | arm, powerpc: expand shifts inline in dtos and dtou arm: branchless code for shl and shr test: more tests for double -> long long conversions. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2234 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Typos in commentsxleroy2013-04-302-3/+3
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2220 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Expand 64-bit integer comparisons into 32-bit integer comparisons.xleroy2013-04-292-144/+0
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2218 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Fixes in PowerPC portxleroy2013-04-216-61/+108
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2209 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Split arch/int64.s into one file per function.xleroy2013-04-2014-442/+911
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2206 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Remove __i64_{neg,add,sub,mul}, now handled directly by the compiler.xleroy2013-04-201-50/+0
| | | | git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2204 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
* Big merge of the newregalloc-int64 branch. Lots of changes in two directions:xleroy2013-04-201-0/+492
1- new register allocator (+ live range splitting, spilling&reloading, etc) based on a posteriori validation using the Rideau-Leroy algorithm 2- support for 64-bit integer arithmetic (type "long long"). git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2200 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e