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-rw-r--r--picorv32.v13
-rw-r--r--picosoc/README.md28
-rw-r--r--picosoc/firmware.c2
-rw-r--r--picosoc/simpleuart.v4
4 files changed, 24 insertions, 23 deletions
diff --git a/picorv32.v b/picorv32.v
index 62e7770..6364cbe 100644
--- a/picorv32.v
+++ b/picorv32.v
@@ -1435,15 +1435,9 @@ module picorv32 #(
next_irq_pending = ENABLE_IRQ ? irq_pending & LATCHED_IRQ : 'bx;
if (ENABLE_IRQ && ENABLE_IRQ_TIMER && timer) begin
- if (timer - 1 == 0)
- next_irq_pending[irq_timer] = 1;
timer <= timer - 1;
end
- if (ENABLE_IRQ) begin
- next_irq_pending = next_irq_pending | irq;
- end
-
decoder_trigger <= mem_do_rinst && mem_done;
decoder_trigger_q <= decoder_trigger;
decoder_pseudo_trigger <= 0;
@@ -1913,6 +1907,13 @@ module picorv32 #(
end
endcase
+ if (ENABLE_IRQ) begin
+ next_irq_pending = next_irq_pending | irq;
+ if(ENABLE_IRQ_TIMER && timer)
+ if (timer - 1 == 0)
+ next_irq_pending[irq_timer] = 1;
+ end
+
if (CATCH_MISALIGN && resetn && (mem_do_rdata || mem_do_wdata)) begin
if (mem_wordsize == 0 && reg_op1[1:0] != 0) begin
`debug($display("MISALIGNED WORD: 0x%08x", reg_op1);)
diff --git a/picosoc/README.md b/picosoc/README.md
index 9c26f14..1708709 100644
--- a/picosoc/README.md
+++ b/picosoc/README.md
@@ -28,20 +28,20 @@ and upload them to a connected iCE40-HX8K Breakout Board.
Run `make icebprog` to build the configuration bit-stream and firmware images
and upload them to a connected iCEBreaker Board.
-| File | Description |
-| --------------------------------- | --------------------------------------------------------------- |
-| [picosoc.v](picosoc.v) | Top-level PicoSoC Verilog module |
-| [spimemio.v](spimemio.v) | Memory controller that interfaces to external SPI flash |
-| [simpleuart.v](simpleuart.v) | Simple UART core connected directly to SoC TX/RX lines |
-| [start.s](start.s) | Assembler source for firmware.hex/firmware.bin |
-| [firmware.c](firmware.c) | C source for firmware.hex/firmware.bin |
-| [sections.lds](sections.lds) | Linker script for firmware.hex/firmware.bin |
-| [hx8kdemo.v](hx8kdemo.v) | FPGA-based example implementation on iCE40-HX8K Breakout Board |
-| [hx8kdemo.pcf](hx8kdemo.pcf) | Pin constraints for implementation on iCE40-HX8K Breakout Board |
-| [hx8kdemo\_tb.v](hx8kdemo_tb.v) | Testbench for implementation on iCE40-HX8K Breakout Board |
-| [icebreaker.v](hx8kdemo.v) | FPGA-based example implementation on iCEBreaker Board |
-| [icebreaker.pcf](hx8kdemo.pcf) | Pin constraints for implementation on iCEBreaker Board |
-| [icebreaker\_tb.v](hx8kdemo_tb.v) | Testbench for implementation on iCEBreaker Board |
+| File | Description |
+| ----------------------------------- | --------------------------------------------------------------- |
+| [picosoc.v](picosoc.v) | Top-level PicoSoC Verilog module |
+| [spimemio.v](spimemio.v) | Memory controller that interfaces to external SPI flash |
+| [simpleuart.v](simpleuart.v) | Simple UART core connected directly to SoC TX/RX lines |
+| [start.s](start.s) | Assembler source for firmware.hex/firmware.bin |
+| [firmware.c](firmware.c) | C source for firmware.hex/firmware.bin |
+| [sections.lds](sections.lds) | Linker script for firmware.hex/firmware.bin |
+| [hx8kdemo.v](hx8kdemo.v) | FPGA-based example implementation on iCE40-HX8K Breakout Board |
+| [hx8kdemo.pcf](hx8kdemo.pcf) | Pin constraints for implementation on iCE40-HX8K Breakout Board |
+| [hx8kdemo\_tb.v](hx8kdemo_tb.v) | Testbench for implementation on iCE40-HX8K Breakout Board |
+| [icebreaker.v](icebreaker.v) | FPGA-based example implementation on iCEBreaker Board |
+| [icebreaker.pcf](icebreaker.pcf) | Pin constraints for implementation on iCEBreaker Board |
+| [icebreaker\_tb.v](icebreaker_tb.v) | Testbench for implementation on iCEBreaker Board |
### Memory map:
diff --git a/picosoc/firmware.c b/picosoc/firmware.c
index c52d5d8..425e036 100644
--- a/picosoc/firmware.c
+++ b/picosoc/firmware.c
@@ -688,7 +688,7 @@ void main()
print(" KiB\n");
print("\n");
- cmd_memtest();
+ //cmd_memtest(); // test overwrites bss and data memory
print("\n");
cmd_print_spi_state();
diff --git a/picosoc/simpleuart.v b/picosoc/simpleuart.v
index 50808cb..1efddef 100644
--- a/picosoc/simpleuart.v
+++ b/picosoc/simpleuart.v
@@ -17,7 +17,7 @@
*
*/
-module simpleuart (
+module simpleuart #(parameter integer DEFAULT_DIV = 1) (
input clk,
input resetn,
@@ -54,7 +54,7 @@ module simpleuart (
always @(posedge clk) begin
if (!resetn) begin
- cfg_divider <= 1;
+ cfg_divider <= DEFAULT_DIV;
end else begin
if (reg_div_we[0]) cfg_divider[ 7: 0] <= reg_div_di[ 7: 0];
if (reg_div_we[1]) cfg_divider[15: 8] <= reg_div_di[15: 8];