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| author | Nadesh Ramanathan <nadeshramanathan88@gmail.com> | 2020-11-09 23:02:31 +0000 |
|---|---|---|
| committer | Nadesh Ramanathan <nadeshramanathan88@gmail.com> | 2020-11-09 23:02:31 +0000 |
| commit | 5c148a980d0963139b2f21a848e01e6fa59cac45 (patch) | |
| tree | f2c91e44592a2fe907a62d43efe54d1964419de4 | |
| parent | 51de50be36b3d092212e6d8a446ec3c8c3ccfc9d (diff) | |
| download | vericert-kvx-5c148a980d0963139b2f21a848e01e6fa59cac45.tar.gz vericert-kvx-5c148a980d0963139b2f21a848e01e6fa59cac45.zip | |
error messaging
| -rwxr-xr-x | benchmarks/polybench-syn/run-vericert.sh | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/benchmarks/polybench-syn/run-vericert.sh b/benchmarks/polybench-syn/run-vericert.sh index c41332d..2086279 100755 --- a/benchmarks/polybench-syn/run-vericert.sh +++ b/benchmarks/polybench-syn/run-vericert.sh @@ -18,22 +18,22 @@ while read benchmark ; do #Undefined checks if test -z $veriresult then - echo "FAIL" - exit 0 + echo "FAIL: Verilog returned nothing" + #exit 0 fi # Don't care checks if [ $veriresult == "x" ] then - echo "FAIL" - exit 0 + echo "FAIL: Verilog returned don't cares" + #exit 0 fi # unequal result check if [ $cresult -ne $veriresult ] then - echo "FAIL" - exit 0 + echo "FAIL: Verilog and C output do not match!" + #exit 0 else echo "PASS" fi |