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authorYann Herklotz <git@yannherklotz.com>2020-10-03 20:06:40 +0100
committerYann Herklotz <git@yannherklotz.com>2020-11-09 20:01:43 +0000
commit7fcc860e1283667255c592638394cc10bb882302 (patch)
treee113b7230c20ae104413bd55e73702e2d408a6f1 /Makefile
parent79d8a87d68eadd33bfc1e5d25d4eb827000a232b (diff)
downloadvericert-kvx-7fcc860e1283667255c592638394cc10bb882302.tar.gz
vericert-kvx-7fcc860e1283667255c592638394cc10bb882302.zip
Fix Makefile for verilog backend
Diffstat (limited to 'Makefile')
-rw-r--r--Makefile7
1 files changed, 3 insertions, 4 deletions
diff --git a/Makefile b/Makefile
index 2935c7f..24cfefd 100644
--- a/Makefile
+++ b/Makefile
@@ -1,13 +1,12 @@
UNAME_S := $(shell uname -s)
ifeq ($(UNAME_S),Linux)
- ARCH := x86_32-linux
+ ARCH := verilog-linux
endif
ifeq ($(UNAME_S),Darwin)
- ARCH := x86_32-macosx
+ ARCH := verilog-macosx
endif
-COMPCERTRECDIRS := lib common x86_32 x86 backend cfrontend driver flocq exportclight \
- MenhirLib cparser
+COMPCERTRECDIRS := lib common verilog backend cfrontend driver exportclight cparser
COQINCLUDES := -R src/common vericert.common -R src/verilog vericert.verilog \
-R src/extraction vericert.extraction -R src/translation vericert.translation \