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| author | James Pollard <james@pollard.dev> | 2020-07-07 15:29:08 +0100 |
|---|---|---|
| committer | James Pollard <james@pollard.dev> | 2020-07-07 15:29:08 +0100 |
| commit | e0fe2958baaa0c61159b2a0e330c323f9f2f646c (patch) | |
| tree | 229151d3ac1325a5c97adecbfb79e8fefeb8db35 /src/extraction | |
| parent | c0be24c8e577d54c11f8cf06512a14a7583a9bb1 (diff) | |
| parent | 6be4bbc2f356184b574a51009b3d8f14ab5557ae (diff) | |
| download | vericert-kvx-e0fe2958baaa0c61159b2a0e330c323f9f2f646c.tar.gz vericert-kvx-e0fe2958baaa0c61159b2a0e330c323f9f2f646c.zip | |
Merge branch 'dev-nadesh' into dev-nadesh-proven
Diffstat (limited to 'src/extraction')
| -rw-r--r-- | src/extraction/Extraction.v | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/extraction/Extraction.v b/src/extraction/Extraction.v index df21dc4..5d10cd7 100644 --- a/src/extraction/Extraction.v +++ b/src/extraction/Extraction.v @@ -16,7 +16,7 @@ * along with this program. If not, see <https://www.gnu.org/licenses/>. *) -From coqup Require Verilog Value Compiler. +From coqup Require Verilog ValueInt Compiler. From Coq Require DecidableClass. @@ -167,7 +167,7 @@ Set Extraction AccessOpaque. Cd "src/extraction". Separate Extraction - Verilog.module Value.uvalueToZ coqup.Compiler.transf_hls + Verilog.module ValueInt.uvalueToZ coqup.Compiler.transf_hls Compiler.transf_c_program Compiler.transf_cminor_program Cexec.do_initial_state Cexec.do_step Cexec.at_final_state |