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| author | James Pollard <james@pollard.dev> | 2020-07-07 14:34:17 +0100 |
|---|---|---|
| committer | James Pollard <james@pollard.dev> | 2020-07-07 14:34:17 +0100 |
| commit | 6be4bbc2f356184b574a51009b3d8f14ab5557ae (patch) | |
| tree | 876334e4223e59df556ced1d438396910a33029f /src/verilog | |
| parent | b3208d9a581e7575c41d545964f4f85c6f3b4d66 (diff) | |
| parent | fcb129725a68a052a079f882396be8e28142e1e0 (diff) | |
| download | vericert-kvx-6be4bbc2f356184b574a51009b3d8f14ab5557ae.tar.gz vericert-kvx-6be4bbc2f356184b574a51009b3d8f14ab5557ae.zip | |
Merge remote-tracking branch 'upstream/develop' into dev-nadesh
Diffstat (limited to 'src/verilog')
| -rw-r--r-- | src/verilog/Verilog.v | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/verilog/Verilog.v b/src/verilog/Verilog.v index 7ede80c..06e250a 100644 --- a/src/verilog/Verilog.v +++ b/src/verilog/Verilog.v @@ -143,7 +143,8 @@ Inductive binop : Type := | Vxor : binop (** xor (binary [^|]) *) | Vshl : binop (** shift left ([<<]) *) | Vshr : binop (** shift right ([>>>]) *) -| Vshru : binop. (** shift right unsigned ([>>]) *) +| Vshru : binop (** shift right unsigned ([>>]) *) +| Vror : binop. (** shift right unsigned ([>>]) *) (** ** Unary Operators *) @@ -329,6 +330,7 @@ Definition binop_run (op : binop) (v1 v2 : value) : option value := | Vshl => Some (Int.shl v1 v2) | Vshr => Some (Int.shr v1 v2) | Vshru => Some (Int.shru v1 v2) + | Vror => Some (Int.ror v1 v2) end. Definition unop_run (op : unop) (v1 : value) : value := |