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-rw-r--r--Makefile2
1 files changed, 1 insertions, 1 deletions
diff --git a/Makefile b/Makefile
index dce965d..2935c7f 100644
--- a/Makefile
+++ b/Makefile
@@ -17,7 +17,7 @@ COQINCLUDES := -R src/common vericert.common -R src/verilog vericert.verilog \
COQEXEC := $(COQBIN)coqtop $(COQINCLUDES) -batch -load-vernac-source
COQMAKE := $(COQBIN)coq_makefile
-COQDOCFLAGS := --no-lib-name
+COQDOCFLAGS := --no-lib-name -l
VS := src/Compiler.v src/Simulator.v $(foreach d, translation common verilog, src/$(d)/*.v)