vericert-kvx - Unnamed repository; edit this file 'description' to name the repository.

	Commit message (Expand)	Author	Age	Files	Lines
*	Update lu.c and update Makefile with extraction	Yann Herklotz	2020-11-14	2	-40/+35
*	Merge branch 'dev-experiments'	Yann Herklotz	2020-11-14	32	-328/+611
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\| *	polybench edits	Nadesh Ramanathan	2020-11-11	29	-310/+295
\| *	divider	Nadesh Ramanathan	2020-11-11	1	-0/+81
\| *	Adding synthesis scripts	Nadesh Ramanathan	2020-11-10	3	-0/+110
\| *	fixing lu	Nadesh Ramanathan	2020-11-10	1	-14/+4
\| *	fixing durbin	Nadesh Ramanathan	2020-11-10	1	-8/+2
\| *	fixing gemver	Nadesh Ramanathan	2020-11-10	1	-6/+8
\| *	remove benchmarks from list	Nadesh Ramanathan	2020-11-10	1	-2/+0
\| *	fixes for cholesky	Nadesh Ramanathan	2020-11-10	1	-26/+22
\| *	fixes for fw	Nadesh Ramanathan	2020-11-10	1	-1/+4
\| *	fixing nussinov	Nadesh Ramanathan	2020-11-10	1	-5/+7
\| *	Merge branch 'dev-experiments' of https://github.com/ymherklotz/vericert into...	Nadesh Ramanathan	2020-11-10	2	-9/+16
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\| \| *	Fix benchmarks to make them compile	Yann Herklotz	2020-11-10	2	-9/+16
\| * \|	adding flag	Nadesh Ramanathan	2020-11-10	1	-1/+1
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\| *	error messaging	Nadesh Ramanathan	2020-11-09	1	-6/+6
\| *	added some checks	Nadesh Ramanathan	2020-11-09	1	-0/+17
\| *	a script to execute polybench on vericert	Nadesh Ramanathan	2020-11-09	2	-0/+53
\| *	Fix Makefile for verilog backend	Yann Herklotz	2020-11-09	4	-7/+8
\| *	Add small changes to durbin and adpcm	Yann Herklotz	2020-11-09	2	-64/+99
\| *	Fix pretty printing bug in Verilog	Yann Herklotz	2020-11-09	1	-2/+2
\| *	Fix printing of negative numbers	Yann Herklotz	2020-11-09	1	-1/+5
* \|	Fix benchmarks to make them compile	Yann Herklotz	2020-11-10	2	-9/+16
* \|	Fix compilation issue	Yann Herklotz	2020-11-10	3	-12/+12
* \|	Change and add back HTLgen	Yann Herklotz	2020-11-09	5	-16/+66
* \|	Update definition of Vneg	Yann Herklotz	2020-11-07	2	-2/+2
* \|	Add hls include file	Yann Herklotz	2020-11-07	1	-0/+45
* \|	Finish implementation of shrx_shrx_alt_equiv	Yann Herklotz	2020-11-05	1	-74/+133
* \|	Comment out blockgen	Yann Herklotz	2020-11-04	1	-1/+2
* \|	Quick compile fix	Yann Herklotz	2020-11-04	2	-2/+6
* \|	Add small changes to durbin and adpcm	Yann Herklotz	2020-11-04	2	-64/+99
* \|	Proven with some assumptions	Yann Herklotz	2020-11-04	1	-4/+20
* \|	Continue to prove signed_neg	Yann Herklotz	2020-11-04	1	-1/+44
* \|	Add to Oshrximm proof	Yann Herklotz	2020-11-03	1	-55/+109
* \|	Add intextra	Yann Herklotz	2020-11-03	1	-0/+115
* \|	Add RTLPar	Yann Herklotz	2020-11-02	1	-0/+98
* \|	Fix pretty printing bug in Verilog	Yann Herklotz	2020-11-02	1	-2/+2
* \|	WIP on RTLBlock semantics	Yann Herklotz	2020-11-02	1	-12/+98
* \|	Add optimisations to output	Yann Herklotz	2020-11-02	3	-16/+78
* \|	Add flag to control if scheduling is active	Yann Herklotz	2020-11-01	2	-2/+8
* \|	Improve performance dramatically for RTLBlock generation	Yann Herklotz	2020-10-31	1	-17/+19
* \|	Fix bugs in Scheduling	Yann Herklotz	2020-10-31	1	-3/+12
* \|	Add tbl_to_casestatement into extraction	Yann Herklotz	2020-10-26	2	-11/+26
* \|	Fix build error with ValueVal	Yann Herklotz	2020-10-26	1	-2/+8
* \|	Add printing of intermediate rtlblock language	Yann Herklotz	2020-10-23	4	-1/+11
* \|	Fix printing of negative numbers	Yann Herklotz	2020-10-23	1	-1/+5
* \|	Fix scheduling for loads and stores with WAR dependencies	Yann Herklotz	2020-10-23	1	-16/+120
* \|	Improve test script	Yann Herklotz	2020-10-23	2	-5/+9
* \|	Finish implementing scheduling and add top level export	Yann Herklotz	2020-10-20	4	-6/+12
* \|	Fix bug in scheduling	Yann Herklotz	2020-10-20	1	-1/+1