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* Add documentation and fix makefile for CompcertYann Herklotz2020-03-316-77/+107
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* Update .gitignoreYann Herklotz2020-03-311-0/+4
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* Add more operators and print themYann Herklotz2020-03-313-41/+84
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* Fix the Makefile buildYann Herklotz2020-03-312-6/+9
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* Use Compcert extractionYann Herklotz2020-03-311-2/+161
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* Fix Makefile buildYann Herklotz2020-03-312-2/+6
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* Improve Verilog error messagesYann Herklotz2020-03-312-2/+11
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* Fix Verilog printingYann Herklotz2020-03-312-33/+35
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* Remove main driverYann Herklotz2020-03-311-19/+0
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* Add main file and global buildingYann Herklotz2020-03-314-12/+450
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* Rename to transf_programYann Herklotz2020-03-291-1/+1
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* Move compilerYann Herklotz2020-03-291-2/+18
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* Complete conversion from HTL to VerilogYann Herklotz2020-03-291-8/+91
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* Change Verilog AST back to more traditional ASTYann Herklotz2020-03-291-30/+44
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* Add Verilog generation from HTLYann Herklotz2020-03-291-0/+135
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* Update .gitignoreYann Herklotz2020-03-292-1/+4
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* Remove unnecessary examples from HTLYann Herklotz2020-03-292-10/+5
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* Update AST and value representationsYann Herklotz2020-03-291-213/+42
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* Update nix files with bbv dependencyYann Herklotz2020-03-292-7/+29
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* Rename Verilog AST filesYann Herklotz2020-03-293-0/+0
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* Update printingYann Herklotz2020-03-254-38/+56
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* Update dependenciesYann Herklotz2020-03-252-16/+15
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* Remove dunes and make the build recursiveYann Herklotz2020-03-254-13/+5
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* Create HTLgenYann Herklotz2020-03-253-148/+5
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* Move driverYann Herklotz2020-03-253-5/+4
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* Add Maps and HTL.vYann Herklotz2020-03-252-0/+235
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* Rename to HTLYann Herklotz2020-03-231-18/+28
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* Create intermediate VTL languageYann Herklotz2020-03-221-0/+63
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* Create a new direct translationYann Herklotz2020-03-222-14/+125
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* Add compcert library to coquplibYann Herklotz2020-03-222-8/+13
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* Convert Tactics to Coquplib: export common modulesYann Herklotz2020-03-201-1/+8
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* Lower case foldersYann Herklotz2020-03-1913-0/+0
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* Merge branch 'master' of github.com:ymherklotz/CoqUpYann Herklotz2020-03-191-2/+2
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| * Update envrcYann Herklotz2020-03-093-3/+8
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* | Update names of directoriesYann Herklotz2020-03-195-27/+52
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* | Add .envrc for a consistent environmentYann Herklotz2020-03-191-0/+8
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* Update Verilog AST with flat arrayYann Herklotz2020-02-182-0/+7
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* Create translationYann Herklotz2020-02-183-6/+25
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* Fix makefile and add travis buildYann Herklotz2020-02-173-8/+11
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* Add shell.nix fileYann Herklotz2020-02-171-0/+1
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* Remove extraction folderYann Herklotz2020-02-171-0/+0
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* Update license to be compatible with CompCertYann Herklotz2020-02-1710-37/+847
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* Add pretty printing for Verilog integrated with CompCertYann Herklotz2020-02-1721-332/+336
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* Update driverYann Herklotz2020-02-144-6/+148
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* Update compcertYann Herklotz2020-02-141-0/+0
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* Update dune file and remove mainYann Herklotz2020-02-142-12/+8
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* Update makefile and Coq dependencies with CompCertYann Herklotz2020-02-143-2/+10
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* Add nix dependenciesYann Herklotz2020-02-141-1/+2
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* Add project files and compcert interconnectYann Herklotz2020-02-144-0/+98
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* Add CompCert as a libraryYann Herklotz2020-02-132-0/+3
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generated by cgit (git 2.34.1) at 2024-07-05 21:14:47 +0000