Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Add RTLBlock intermediate language | Yann Herklotz | 2020-08-30 | 1 | -2683/+0 |
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* | Add html generation and clean Coq files | Yann Herklotz | 2020-08-13 | 1 | -2/+1 |
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* | Finished all the proofsv1.0.0 | Yann Herklotz | 2020-08-13 | 1 | -31/+37 |
| | | | | Removed support for case statements temporarily. | ||||
* | Remove unnecessary commented proof | Yann Herklotz | 2020-08-12 | 1 | -23/+0 |
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* | Finish proof of conditionals | Yann Herklotz | 2020-08-12 | 1 | -4/+11 |
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* | Nearly finished all proofs | Yann Herklotz | 2020-08-12 | 1 | -48/+228 |
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* | Remove alignment constraint during translation. | James Pollard | 2020-08-11 | 1 | -55/+59 |
| | | | | This is now inferred from the memory model. | ||||
* | Remove last admits from istore | Yann Herklotz | 2020-08-04 | 1 | -2/+3 |
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* | Finish istore and iload without any admits | Yann Herklotz | 2020-08-04 | 1 | -118/+113 |
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* | No admitted in iload proof | Yann Herklotz | 2020-08-04 | 1 | -38/+72 |
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* | Merge remote-tracking branch 'james/develop' into develop | Yann Herklotz | 2020-08-04 | 1 | -5/+6 |
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| * | Fix broken proof. | James Pollard | 2020-08-04 | 1 | -5/+6 |
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* | | Add expr_ok proof | Yann Herklotz | 2020-08-04 | 1 | -11/+25 |
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* | Fix first part of istore | Yann Herklotz | 2020-08-04 | 1 | -40/+43 |
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* | Fix iload proof | Yann Herklotz | 2020-08-04 | 1 | -43/+48 |
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* | Add proof of divisibility | Yann Herklotz | 2020-08-04 | 1 | -21/+14 |
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* | More renames to get it to compile | Yann Herklotz | 2020-07-24 | 1 | -2/+3 |
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* | Change name to Vericert | Yann Herklotz | 2020-07-14 | 1 | -10/+9 |
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* | Fixes to operators | Yann Herklotz | 2020-07-07 | 1 | -2/+5 |
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* | Finished transl_cond | Yann Herklotz | 2020-07-07 | 1 | -58/+45 |
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* | Only translate_cond left | Yann Herklotz | 2020-07-07 | 1 | -6/+197 |
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* | No admitted in Deterministic proof | Yann Herklotz | 2020-07-07 | 1 | -2/+2 |
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* | A few operations left | Yann Herklotz | 2020-07-07 | 1 | -30/+88 |
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* | Proof of TransfHTLLink DONE | Yann Herklotz | 2020-07-07 | 1 | -1/+14 |
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* | Add top level backward simulation | Yann Herklotz | 2020-07-06 | 1 | -72/+77 |
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* | HTLgenproof compiles again | Yann Herklotz | 2020-07-06 | 1 | -14/+30 |
| | | | | - Commented out Iload, Istore proofs for now | ||||
* | Fix Inop | Yann Herklotz | 2020-07-05 | 1 | -11/+14 |
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* | No addmitted in Veriloggenproof | Yann Herklotz | 2020-07-05 | 1 | -1/+0 |
| | | | | However, there may have been breaking changes to HTLgenproof. | ||||
* | Make HTLgen compile again | Yann Herklotz | 2020-07-04 | 1 | -3/+11 |
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* | Fixing HTLgenproof | Yann Herklotz | 2020-07-03 | 1 | -13/+32 |
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* | Updates to Iop proof | Yann Herklotz | 2020-07-03 | 1 | -89/+101 |
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* | Switch to uvalueToZ in lessdef. | James Pollard | 2020-07-02 | 1 | -36/+31 |
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* | Complete ZToValue_valueToNat. | James Pollard | 2020-07-02 | 1 | -22/+16 |
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* | Fix callstate proof. | James Pollard | 2020-07-02 | 1 | -7/+7 |
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* | Stuck in Callstate proof | Yann Herklotz | 2020-07-02 | 1 | -20/+17 |
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* | Push current state | Yann Herklotz | 2020-07-02 | 1 | -26/+44 |
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* | Remove all <> Admitted | Yann Herklotz | 2020-07-02 | 1 | -23/+12 |
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* | Fix spec by adding details about reg vals | Yann Herklotz | 2020-07-02 | 1 | -14/+1 |
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* | Tidy up (?) automation slightly... | James Pollard | 2020-07-01 | 1 | -20/+17 |
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* | Improve (?) automation. | James Pollard | 2020-07-01 | 1 | -407/+301 |
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* | Remove some explicit evar instantiations. | James Pollard | 2020-06-30 | 1 | -23/+28 |
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* | Heavy automation of proofs. | James Pollard | 2020-06-30 | 1 | -306/+79 |
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* | Factor out lemmas in main induction proof. | James Pollard | 2020-06-30 | 1 | -1669/+1813 |
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* | Fix stack frame issue. | James Pollard | 2020-06-30 | 1 | -46/+25 |
| | | | | | | | | | | We never cons a stack frame since we don't support calls (aside from the initial call which doesn't push a stack frame); removing the cons constructor solves the issue regarding memory separation. This means we now _can't_ support calls even if we wanted to, but due to the way we implement memory, we would need quite a lot of extra work to support this. | ||||
* | Eliminate memory bounds assumption! | James Pollard | 2020-06-29 | 1 | -35/+209 |
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* | Fix proof again with Verilog semantics changes | Yann Herklotz | 2020-06-28 | 1 | -1/+11 |
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* | Merge remote-tracking branch 'james/arrays-proof' into develop | Yann Herklotz | 2020-06-28 | 1 | -68/+809 |
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| * | Finish store proof modulo: | James Pollard | 2020-06-28 | 1 | -1/+206 |
| | | | | | | | | | | | | | | * EXPR_OK proofs (Yann). * Trivial register size proof (i.e. register values < 2^32). * Read bounds (to be extracted from RTL semantics). * Stack frame proof issues. | ||||
| * | Fix second IStore proof. | James Pollard | 2020-06-28 | 1 | -29/+50 |
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| * | Finish first IStore proof (modulo some admissions). | James Pollard | 2020-06-28 | 1 | -57/+293 |
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