Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | Remove Verilog proofs | Yann Herklotz | 2020-06-12 | 1 | -113/+0 |
* | Redefine HTL for intermediate Verilog language | Yann Herklotz | 2020-05-07 | 1 | -0/+18 |
* | Add proofs and specification of Verilog conversion | Yann Herklotz | 2020-05-03 | 1 | -0/+112 |