Improve the benchmark Makefile

2 files changed, 8 insertions, 4 deletions

diff --git a/benchmarks/polybench-syn/common.mk b/benchmarks/polybench-syn/common.mk
index 88fb059..85d62f6 100644
--- a/benchmarks/polybench-syn/common.mk
+++ b/benchmarks/polybench-syn/common.mk
@@ -1,5 +1,5 @@
 VERICERT ?= vericert
-VERICERT_OPTS ?= -DSYNTHESIS -O0 -finline
+VERICERT_OPTS ?= -DSYNTHESIS -O0 -finline -fschedule -fif-conv
 
 IVERILOG ?= iverilog
 IVERILOG_OPTS ?=
diff --git a/benchmarks/polybench-syn/run-vericert.sh b/benchmarks/polybench-syn/run-vericert.sh
index ef6964f..9deaa10 100755
--- a/benchmarks/polybench-syn/run-vericert.sh
+++ b/benchmarks/polybench-syn/run-vericert.sh
@@ -10,27 +10,31 @@ while read benchmark ; do
    cresult=$(cat $benchmark.clog | cut -d' ' -f2)
    #echo "C output: "$cresult
    #./$benchmark.iver > $benchmark.tmp
+   if [[ ! -f ./$benchmark.verilator/Vmain ]]; then
+      echo -e "\e[0;91mFAIL\e[0m: Verilog failed compilation"
+      continue
+   fi
    ./$benchmark.verilator/Vmain > $benchmark.tmp
    veriresult=$(tail -1 $benchmark.tmp | cut -d' ' -f2)
    cycles=$(tail -2 $benchmark.tmp | head -1 | tr -s ' ' | cut -d' ' -f2)
    #echo "Verilog output: "$veriresult
 
    #Undefined checks
-   if test -z $veriresult 
+   if [[ -z "$veriresult" ]]
    then
       echo "\e[0;91mFAIL\e[0m: Verilog returned nothing"
       #exit 0
    fi
    
    # Don't care checks
-   if [ $veriresult == "x" ] 
+   if [[ $veriresult == "x" ]]
    then
       echo "\e[0;91mFAIL\e[0m: Verilog returned don't cares"
       #exit 0
    fi
 
    # unequal result check
-   if [ $cresult -ne $veriresult ] 
+   if [[ $cresult -ne $veriresult ]]
    then 
       echo -e "\e[0;91mFAIL\e[0m: Verilog and C output do not match!"
       #exit 0