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author | Yann Herklotz <git@yannherklotz.com> | 2022-03-19 12:05:44 +0000 |
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committer | Yann Herklotz <git@yannherklotz.com> | 2022-03-22 16:18:06 +0000 |
commit | 27fea2fe14a81f4e73e0e3e53ec5ac5db07a5d82 (patch) | |
tree | 4c474f1426a0f84f131300eff3c70f43cf7f77bc /benchmarks/polybench-syn-div/quartus_synth.tcl | |
parent | 23fe30f8c23ecb743880cb9239410eb51bf1abab (diff) | |
download | vericert-27fea2fe14a81f4e73e0e3e53ec5ac5db07a5d82.tar.gz vericert-27fea2fe14a81f4e73e0e3e53ec5ac5db07a5d82.zip |
Delete extra data files and scripts
Diffstat (limited to 'benchmarks/polybench-syn-div/quartus_synth.tcl')
-rw-r--r-- | benchmarks/polybench-syn-div/quartus_synth.tcl | 35 |
1 files changed, 0 insertions, 35 deletions
diff --git a/benchmarks/polybench-syn-div/quartus_synth.tcl b/benchmarks/polybench-syn-div/quartus_synth.tcl deleted file mode 100644 index 6edbf0c..0000000 --- a/benchmarks/polybench-syn-div/quartus_synth.tcl +++ /dev/null @@ -1,35 +0,0 @@ -# PRiME pre-KAPow kernel flow -# Performs pre-KAPow run steps for instrumenting arbitrary Verilog for power monitoring -# James Davis, 2015 - -load_package flow - -project_new -overwrite syn -set_global_assignment -name FAMILY "Arria 10" -set_global_assignment -name DEVICE 10AX115H4F34E3LG -set_global_assignment -name SYSTEMVERILOG_FILE top.v -set_global_assignment -name TOP_LEVEL_ENTITY main -#set_global_assignment -name SDC_FILE syn.sdc -#set_global_assignment -name auto_resource_sharing on -#set_global_assignment -name enable_state_machine_inference on -#set_global_assignment -name optimization_technique area -#set_global_assignment -name synthesis_effort fast -#set_global_assignment -name AUTO_RAM_RECOGNITION on -#set_global_assignment -name remove_duplicate_registers on -#set_instance_assignment -name RAMSTYLE_ATTRIBUTE LOGIC -to ram - -execute_module -tool map - -execute_module -tool fit - -execute_module -tool sta - -#execute_module -tool eda -args "--simulation --tool=vcs" - -# set_global_assignment -name POWER_OUTPUT_SAF_NAME ${kernel}.asf -# set_global_assignment -name POWER_DEFAULT_INPUT_IO_TOGGLE_RATE "12.5 %" -# set_global_assignment -name POWER_REPORT_SIGNAL_ACTIVITY ON -# set_global_assignment -name POWER_REPORT_POWER_DISSIPATION ON -# execute_module -tool pow - -project_close |