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author | Yann Herklotz <git@yannherklotz.com> | 2023-07-29 13:49:03 +0100 |
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committer | Yann Herklotz <git@yannherklotz.com> | 2023-07-29 13:49:03 +0100 |
commit | 502e49e2f8c95b40cd0761cbb69c863904169f8b (patch) | |
tree | e417f9a1d17f84a25ecd00be1ccb9cdda8b8e6ea /src/Compiler.v | |
parent | 93117b6e766c25c5aeecdc20a963d5114fb91e59 (diff) | |
download | vericert-502e49e2f8c95b40cd0761cbb69c863904169f8b.tar.gz vericert-502e49e2f8c95b40cd0761cbb69c863904169f8b.zip |
Add beginning to memory generation proof
Diffstat (limited to 'src/Compiler.v')
-rw-r--r-- | src/Compiler.v | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/src/Compiler.v b/src/Compiler.v index 49464c0..a674866 100644 --- a/src/Compiler.v +++ b/src/Compiler.v @@ -65,6 +65,7 @@ Require vericert.hls.GibleSeq. Require vericert.hls.GibleSeqgen. Require vericert.hls.GiblePargen. Require vericert.hls.HTLPargen. +Require vericert.hls.DVeriloggen. (*Require vericert.hls.Pipeline.*) Require vericert.hls.IfConversion. Require vericert.hls.CondElim. @@ -72,6 +73,7 @@ Require vericert.hls.DeadBlocks. (*Require vericert.hls.PipelineOp.*) Require vericert.HLSOpts. Require vericert.hls.Memorygen. +Require vericert.hls.DMemorygen. Require Import vericert.hls.HTLgenproof. @@ -86,6 +88,7 @@ intermediate steps in the compilation, such as ``print_RTL``, ``print_HTL`` and Parameter print_RTL: Z -> RTL.program -> unit. Parameter print_HTL: Z -> HTL.program -> unit. +Parameter print_DHTL: Z -> DHTL.program -> unit. Parameter print_GibleSeq: Z -> GibleSeq.GibleSeq.program -> unit. Parameter print_GiblePar: Z -> GiblePar.GiblePar.program -> unit. @@ -292,8 +295,10 @@ Definition transf_hls_temp (p : Csyntax.program) : res Verilog.program := @@@ GiblePargen.transl_program @@ print (print_GiblePar 0) @@@ HTLPargen.transl_program - @@ print (print_HTL 0) - @@ Veriloggen.transl_program. + @@ print (print_DHTL 0) + @@ DMemorygen.transf_program + @@ print (print_DHTL 0) + @@ DVeriloggen.transl_program. (*| Correctness Proof |