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| author | Yann Herklotz <git@yannherklotz.com> | 2021-01-13 17:57:23 +0000 |
|---|---|---|
| committer | Yann Herklotz <git@yannherklotz.com> | 2021-01-13 17:57:23 +0000 |
| commit | 6cff3d1683ed19ca497975394d9a11df1b027c28 (patch) | |
| tree | 38c88cacb4da8ca30043a9bf4001607ff12b54bb /src/Compiler.v | |
| parent | 2f4682ed99595587a08aaf18248dc470efc6472b (diff) | |
| download | vericert-6cff3d1683ed19ca497975394d9a11df1b027c28.tar.gz vericert-6cff3d1683ed19ca497975394d9a11df1b027c28.zip | |
Add missing modules to extraction and compile
Diffstat (limited to 'src/Compiler.v')
| -rw-r--r-- | src/Compiler.v | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/Compiler.v b/src/Compiler.v index 5895e1d..ce36d5b 100644 --- a/src/Compiler.v +++ b/src/Compiler.v @@ -74,7 +74,8 @@ From vericert Require HTLgen RTLBlock RTLBlockgen - HTLSchedulegen + RTLPargen + HTLPargen Pipeline. From compcert Require Import Smallstep. @@ -245,7 +246,8 @@ Definition transf_hls_temp (p : Csyntax.program) : res Verilog.program := @@ print (print_RTL 8) @@@ RTLBlockgen.transl_program @@ print print_RTLBlock - @@@ HTLSchedulegen.transl_program + @@@ RTLPargen.transl_program + @@@ HTLPargen.transl_program @@ print print_HTL @@ Veriloggen.transl_program. |