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| author | Yann Herklotz <git@yannherklotz.com> | 2021-10-18 17:05:46 +0100 |
|---|---|---|
| committer | Yann Herklotz <git@yannherklotz.com> | 2021-10-18 17:05:46 +0100 |
| commit | fbfa988072ce2eba808b9a6631af5f8e86cd9df0 (patch) | |
| tree | 5146e558d5c9c6e9a399225eed0784b8dc12558f /src/Compiler.v | |
| parent | 603768a49eac2005729dd03e723ff6c5a6b292f7 (diff) | |
| parent | fe06668f0de56635efe55310d7a64289a37c1d90 (diff) | |
| download | vericert-fbfa988072ce2eba808b9a6631af5f8e86cd9df0.tar.gz vericert-fbfa988072ce2eba808b9a6631af5f8e86cd9df0.zip | |
Merge branch 'master' into dev/michalisdev/michalis
Diffstat (limited to 'src/Compiler.v')
| -rw-r--r-- | src/Compiler.v | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/src/Compiler.v b/src/Compiler.v index bb9575e..1b615d2 100644 --- a/src/Compiler.v +++ b/src/Compiler.v @@ -85,6 +85,7 @@ We then need to declare the external OCaml functions used to print out intermedi Parameter print_RTL: Z -> RTL.program -> unit. Parameter print_HTL: Z -> HTL.program -> unit. Parameter print_RTLBlock: Z -> RTLBlock.program -> unit. +Parameter print_RTLPar: Z -> RTLPar.program -> unit. Definition print {A: Type} (printer: A -> unit) (prog: A) : A := let unused := printer prog in prog. @@ -223,7 +224,7 @@ Definition transf_hls (p : Csyntax.program) : res Verilog.program := (* This is an unverified version of transf_hls with some experimental additions such as scheduling that aren't completed yet. *) -(*Definition transf_hls_temp (p : Csyntax.program) : res Verilog.program := +Definition transf_hls_temp (p : Csyntax.program) : res Verilog.program := OK p @@@ SimplExpr.transl_program @@@ SimplLocals.transf_program @@ -246,13 +247,14 @@ that aren't completed yet. *) @@@ time "Unused globals" Unusedglob.transform_program @@ print (print_RTL 7) @@@ RTLBlockgen.transl_program - @@ print (print_RTLBlock 1) + @@ print (print_RTLBlock 0) @@ total_if HLSOpts.optim_if_conversion IfConversion.transf_program - @@ print (print_RTLBlock 2) + @@ print (print_RTLBlock 1) @@@ RTLPargen.transl_program + @@ print (print_RTLPar 0) @@@ HTLPargen.transl_program - @@ print print_HTL - @@ Veriloggen.transl_program.*) + @@ print (print_HTL 0) + @@ Veriloggen.transl_program. (*| Correctness Proof |