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author | Yann Herklotz <git@yannherklotz.com> | 2021-09-24 12:59:06 +0100 |
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committer | Yann Herklotz <git@yannherklotz.com> | 2021-09-24 12:59:06 +0100 |
commit | a6fb1adadcf2421b76cde649369f457a2a9ed66c (patch) | |
tree | 430f8bf9031e506c2a6452687bc7c0c154c29d20 /src/Compiler.v | |
parent | 244270b446721d5eeb1ed15ec2839aa4d246965c (diff) | |
download | vericert-a6fb1adadcf2421b76cde649369f457a2a9ed66c.tar.gz vericert-a6fb1adadcf2421b76cde649369f457a2a9ed66c.zip |
Compile HTLPargen again
Diffstat (limited to 'src/Compiler.v')
-rw-r--r-- | src/Compiler.v | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/Compiler.v b/src/Compiler.v index de29889..268f451 100644 --- a/src/Compiler.v +++ b/src/Compiler.v @@ -216,7 +216,7 @@ Definition transf_hls (p : Csyntax.program) : res Verilog.program := (* This is an unverified version of transf_hls with some experimental additions such as scheduling that aren't completed yet. *) -(*Definition transf_hls_temp (p : Csyntax.program) : res Verilog.program := +Definition transf_hls_temp (p : Csyntax.program) : res Verilog.program := OK p @@@ SimplExpr.transl_program @@@ SimplLocals.transf_program @@ -245,7 +245,7 @@ that aren't completed yet. *) @@@ RTLPargen.transl_program @@@ HTLPargen.transl_program @@ print print_HTL - @@ Veriloggen.transl_program.*) + @@ Veriloggen.transl_program. (*| Correctness Proof |