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author | Yann Herklotz <git@yannherklotz.com> | 2020-11-26 01:00:13 +0000 |
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committer | Yann Herklotz <git@yannherklotz.com> | 2020-11-26 01:00:13 +0000 |
commit | 29bee524cccfe08c680f655b1969a4c421e0a969 (patch) | |
tree | 9a98159b31f566ad48712b7ada8bb6c25cf763c5 /src/extraction/Extraction.v | |
parent | d64f47def97420f40f61a53c385143b94b30b5b3 (diff) | |
download | vericert-29bee524cccfe08c680f655b1969a4c421e0a969.tar.gz vericert-29bee524cccfe08c680f655b1969a4c421e0a969.zip |
Fix build for Coq 8.12.1
Diffstat (limited to 'src/extraction/Extraction.v')
-rw-r--r-- | src/extraction/Extraction.v | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/extraction/Extraction.v b/src/extraction/Extraction.v index c2b3951..e8cfe50 100644 --- a/src/extraction/Extraction.v +++ b/src/extraction/Extraction.v @@ -18,7 +18,6 @@ From vericert Require Verilog - Value Compiler RTLBlockgen RTLBlock @@ -178,7 +177,7 @@ Set Extraction AccessOpaque. Cd "src/extraction". Separate Extraction - Verilog.module Value.uvalueToZ vericert.Compiler.transf_hls + Verilog.module vericert.Compiler.transf_hls vericert.Compiler.transf_hls_temp vericert.Compiler.transf_hls_opt RTLBlockgen.transl_program RTLBlock.successors_instr |